1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
15 which can be powered up/down by software based on different
16 application scenarios to save power.
18 Power domains contained within power-controller node are
19 generic power domain providers documented in
20 Documentation/devicetree/bindings/power/power-domain.yaml.
22 IP cores belonging to a power domain should contain a
23 "power-domains" property that is a phandle for the
24 power domain node representing the domain.
28 const: power-controller
32 - rockchip,px30-power-controller
33 - rockchip,rk3036-power-controller
34 - rockchip,rk3066-power-controller
35 - rockchip,rk3128-power-controller
36 - rockchip,rk3188-power-controller
37 - rockchip,rk3228-power-controller
38 - rockchip,rk3288-power-controller
39 - rockchip,rk3328-power-controller
40 - rockchip,rk3366-power-controller
41 - rockchip,rk3368-power-controller
42 - rockchip,rk3399-power-controller
43 - rockchip,rk3568-power-controller
45 "#power-domain-cells":
56 - "#power-domain-cells"
58 additionalProperties: false
61 "^power-domain@[0-9a-f]+$":
63 $ref: "#/$defs/pd-node"
65 unevaluatedProperties: false
75 "^power-domain@[0-9a-f]+$":
77 $ref: "#/$defs/pd-node"
79 unevaluatedProperties: false
89 "^power-domain@[0-9a-f]+$":
91 $ref: "#/$defs/pd-node"
93 unevaluatedProperties: false
96 "#power-domain-cells":
103 Represents the power domains within the power controller node.
109 Power domain index. Valid values are defined in
110 "include/dt-bindings/power/px30-power.h"
111 "include/dt-bindings/power/rk3036-power.h"
112 "include/dt-bindings/power/rk3066-power.h"
113 "include/dt-bindings/power/rk3128-power.h"
114 "include/dt-bindings/power/rk3188-power.h"
115 "include/dt-bindings/power/rk3228-power.h"
116 "include/dt-bindings/power/rk3288-power.h"
117 "include/dt-bindings/power/rk3328-power.h"
118 "include/dt-bindings/power/rk3366-power.h"
119 "include/dt-bindings/power/rk3368-power.h"
120 "include/dt-bindings/power/rk3399-power.h"
121 "include/dt-bindings/power/rk3568-power.h"
127 A number of phandles to clocks that need to be enabled
128 while power domain switches state.
131 $ref: /schemas/types.yaml#/definitions/phandle-array
135 A number of phandles to qos blocks which need to be saved and restored
136 while power domain switches state.
138 "#power-domain-cells":
141 Must be 0 for nodes representing a single PM domain and 1 for nodes
142 providing multiple PM domains.
146 - "#power-domain-cells"
150 #include <dt-bindings/clock/rk3399-cru.h>
151 #include <dt-bindings/power/rk3399-power.h>
154 #address-cells = <2>;
157 qos_hdcp: qos@ffa90000 {
158 compatible = "rockchip,rk3399-qos", "syscon";
159 reg = <0x0 0xffa90000 0x0 0x20>;
162 qos_iep: qos@ffa98000 {
163 compatible = "rockchip,rk3399-qos", "syscon";
164 reg = <0x0 0xffa98000 0x0 0x20>;
167 qos_rga_r: qos@ffab0000 {
168 compatible = "rockchip,rk3399-qos", "syscon";
169 reg = <0x0 0xffab0000 0x0 0x20>;
172 qos_rga_w: qos@ffab0080 {
173 compatible = "rockchip,rk3399-qos", "syscon";
174 reg = <0x0 0xffab0080 0x0 0x20>;
177 qos_video_m0: qos@ffab8000 {
178 compatible = "rockchip,rk3399-qos", "syscon";
179 reg = <0x0 0xffab8000 0x0 0x20>;
182 qos_video_m1_r: qos@ffac0000 {
183 compatible = "rockchip,rk3399-qos", "syscon";
184 reg = <0x0 0xffac0000 0x0 0x20>;
187 qos_video_m1_w: qos@ffac0080 {
188 compatible = "rockchip,rk3399-qos", "syscon";
189 reg = <0x0 0xffac0080 0x0 0x20>;
192 power-management@ff310000 {
193 compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
194 reg = <0x0 0xff310000 0x0 0x1000>;
197 compatible = "rockchip,rk3399-power-controller";
198 #power-domain-cells = <1>;
199 #address-cells = <1>;
202 /* These power domains are grouped by VD_CENTER */
203 power-domain@RK3399_PD_IEP {
204 reg = <RK3399_PD_IEP>;
205 clocks = <&cru ACLK_IEP>,
208 #power-domain-cells = <0>;
210 power-domain@RK3399_PD_RGA {
211 reg = <RK3399_PD_RGA>;
212 clocks = <&cru ACLK_RGA>,
214 pm_qos = <&qos_rga_r>,
216 #power-domain-cells = <0>;
218 power-domain@RK3399_PD_VCODEC {
219 reg = <RK3399_PD_VCODEC>;
220 clocks = <&cru ACLK_VCODEC>,
222 pm_qos = <&qos_video_m0>;
223 #power-domain-cells = <0>;
225 power-domain@RK3399_PD_VDU {
226 reg = <RK3399_PD_VDU>;
227 clocks = <&cru ACLK_VDU>,
229 pm_qos = <&qos_video_m1_r>,
231 #power-domain-cells = <0>;
233 power-domain@RK3399_PD_VIO {
234 reg = <RK3399_PD_VIO>;
235 #power-domain-cells = <1>;
236 #address-cells = <1>;
239 power-domain@RK3399_PD_HDCP {
240 reg = <RK3399_PD_HDCP>;
241 clocks = <&cru ACLK_HDCP>,
244 pm_qos = <&qos_hdcp>;
245 #power-domain-cells = <0>;