1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
14 counters and Power Gating Control (PGC).
16 The power domains are generic power domain providers as documented in
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
18 described as subnodes of the power gating controller 'pgc' node of the GPC.
20 IP cores belonging to a power domain should contain a 'power-domains'
21 property that is a phandle pointing to the power domain the device belongs
46 additionalProperties: false
47 description: list of power domains provided by this controller.
57 "power-domain@[0-9]$":
59 additionalProperties: false
63 '#power-domain-cells':
68 The following DOMAIN_INDEX values are valid for i.MX6Q:
71 The following additional DOMAIN_INDEX value is valid for i.MX6SL:
73 The following additional DOMAIN_INDEX value is valid for i.MX6SX:
79 A number of phandles to clocks that need to be enabled during domain
80 power-up sequencing to ensure reset propagation into devices located
81 inside this power domain.
88 - '#power-domain-cells'
103 additionalProperties: false
107 #include <dt-bindings/clock/imx6qdl-clock.h>
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
111 compatible = "fsl,imx6q-gpc";
112 reg = <0x020dc000 0x4000>;
113 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
114 clocks = <&clks IMX6QDL_CLK_IPG>;
118 #address-cells = <1>;
123 #power-domain-cells = <0>;
126 pd_pu: power-domain@1 {
128 #power-domain-cells = <0>;
129 power-supply = <®_pu>;
130 clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
131 <&clks IMX6QDL_CLK_GPU3D_SHADER>,
132 <&clks IMX6QDL_CLK_GPU2D_CORE>,
133 <&clks IMX6QDL_CLK_GPU2D_AXI>,
134 <&clks IMX6QDL_CLK_OPENVG_AXI>,
135 <&clks IMX6QDL_CLK_VPU_AXI>;