1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright (C) STMicroelectronics 2019.
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
14 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
15 controller. It controls the input/output settings on the available pins and
16 also provides ability to multiplex and configure the output of various
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp135-pinctrl
28 - st,stm32mp157-pinctrl
29 - st,stm32mp157-z-pinctrl
37 pins-are-numbered: true
44 description: Phandle+args to the syscon node which includes IRQ mux selection.
45 $ref: "/schemas/types.yaml#/definitions/phandle-array"
48 - description: syscon node which includes IRQ mux selection
49 - description: The offset of the IRQ mux selection register
50 - description: The field mask of IRQ mux, needed if different of 0xf
54 Indicates the SOC package used.
55 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
56 $ref: /schemas/types.yaml#/definitions/uint32
62 additionalProperties: false
67 interrupt-controller: true
83 Number of available gpios in a bank.
89 Should be a name string for this bank as specified in the datasheet.
90 $ref: "/schemas/types.yaml#/definitions/string"
107 Should correspond to the EXTI IOport selection (EXTI line used
108 to select GPIOs as interrupts).
109 $ref: "/schemas/types.yaml#/definitions/uint32"
114 "^(.+-hog(-[0-9]+)?)$":
128 additionalProperties: false
133 additionalProperties: false
135 A pinctrl node should contain at least one subnode representing the
136 pinctrl group available on the machine. Each subnode will list the
137 pins it needs, and how they should be configured, with regard to muxer
138 configuration, pullups, drive, output high/low and output speed.
141 $ref: "/schemas/types.yaml#/definitions/uint32-array"
143 Integer array, represents gpio pin number and mux setting.
144 Supported pin number and mux varies for different SoCs, and are
145 defined in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
146 These defines are calculated as: ((port * 16 + line) << 8) | function
148 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
149 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
150 - function: The function number, can be:
152 * 1 : Alternate Function 0
153 * 2 : Alternate Function 1
154 * 3 : Alternate Function 2
156 * 16 : Alternate Function 15
158 To simplify the usage, macro is available to generate "pinmux" field.
159 This macro is available here:
160 - include/dt-bindings/pinctrl/stm32-pinfunc.h
161 Some examples of using macro:
162 /* GPIO A9 set as alernate function 2 */
164 pinmux = <STM32_PINMUX('A', 9, AF2)>;
166 /* GPIO A9 set as GPIO */
168 pinmux = <STM32_PINMUX('A', 9, GPIO)>;
170 /* GPIO A9 set as analog */
172 pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
195 $ref: /schemas/types.yaml#/definitions/uint32
202 - $ref: "pinctrl.yaml#"
211 additionalProperties: false
215 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
216 #include <dt-bindings/mfd/stm32f4-rcc.h>
219 #address-cells = <1>;
221 compatible = "st,stm32f429-pinctrl";
222 ranges = <0 0x40020000 0x3000>;
229 resets = <&reset_ahb1 0>;
230 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
231 st,bank-name = "GPIOA";
235 //Example 2 (using gpio-ranges)
237 #address-cells = <1>;
239 compatible = "st,stm32f429-pinctrl";
240 ranges = <0 0x50020000 0x3000>;
246 reg = <0x1000 0x400>;
247 resets = <&reset_ahb1 0>;
248 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
249 st,bank-name = "GPIOB";
250 gpio-ranges = <&pinctrl 0 0 16>;
256 reg = <0x2000 0x400>;
257 resets = <&reset_ahb1 0>;
258 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
259 st,bank-name = "GPIOC";
261 gpio-ranges = <&pinctrl 0 16 3>,
266 //Example 3 pin groups
268 usart1_pins_a: usart1-0 {
270 pinmux = <STM32_PINMUX('A', 9, AF7)>;
276 pinmux = <STM32_PINMUX('A', 10, AF7)>;
283 pinctrl-0 = <&usart1_pins_a>;
284 pinctrl-names = "default";