Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Samsung S3C/S5P/Exynos SoC pin controller
   8
   9 maintainers:
  10   - Krzysztof Kozlowski <krzk@kernel.org>
  11   - Sylwester Nawrocki <s.nawrocki@samsung.com>
  12   - Tomasz Figa <tomasz.figa@gmail.com>
  13
  14 description: |
  15   This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
  16   controller.
  17
  18   All the pin controller nodes should be represented in the aliases node using
  19   the following format 'pinctrl{n}' where n is a unique number for the alias.
  20
  21   The controller supports three types of interrupts::
  22    - External GPIO interrupts (see interrupts property in pin controller node);
  23
  24    - External wake-up interrupts - multiplexed (capable of waking up the system
  25      see interrupts property in external wake-up interrupt controller node -
  26      samsung,pinctrl-wakeup-interrupt.yaml);
  27
  28    - External wake-up interrupts - direct (capable of waking up the system, see
  29      interrupts property in every bank of pin controller with external wake-up
  30      interrupt controller - samsung,pinctrl-gpio-bank.yaml).
  31
  32 properties:
  33   $nodename:
  34     pattern: "^pinctrl(@.*)?"
  35
  36   compatible:
  37     enum:
  38       - samsung,s3c2412-pinctrl
  39       - samsung,s3c2416-pinctrl
  40       - samsung,s3c2440-pinctrl
  41       - samsung,s3c2450-pinctrl
  42       - samsung,s3c64xx-pinctrl
  43       - samsung,s5pv210-pinctrl
  44       - samsung,exynos3250-pinctrl
  45       - samsung,exynos4210-pinctrl
  46       - samsung,exynos4x12-pinctrl
  47       - samsung,exynos5250-pinctrl
  48       - samsung,exynos5260-pinctrl
  49       - samsung,exynos5410-pinctrl
  50       - samsung,exynos5420-pinctrl
  51       - samsung,exynos5433-pinctrl
  52       - samsung,exynos7-pinctrl
  53       - samsung,exynos7885-pinctrl
  54       - samsung,exynos850-pinctrl
  55       - samsung,exynosautov9-pinctrl
  56       - tesla,fsd-pinctrl
  57
  58   interrupts:
  59     description:
  60       Required for GPIO banks supporting external GPIO interrupts.
  61     maxItems: 1
  62
  63   power-domains:
  64     maxItems: 1
  65
  66   reg:
  67     description:
  68       Second base address of the pin controller if the specific registers of
  69       the pin controller are separated into the different base address.
  70       Only certain banks of certain pin controller might need it.
  71     minItems: 1
  72     maxItems: 2
  73
  74   wakeup-interrupt-controller:
  75     $ref: samsung,pinctrl-wakeup-interrupt.yaml
  76
  77 patternProperties:
  78   "^[a-z]+[0-9]*-gpio-bank$":
  79     description:
  80       Pin banks of the controller are represented by child nodes of the
  81       controller node. Bank name is taken from name of the node.
  82     $ref: samsung,pinctrl-gpio-bank.yaml
  83
  84   "^[a-z0-9-]+-pins$":
  85     oneOf:
  86       - $ref: samsung,pinctrl-pins-cfg.yaml
  87         required:
  88           - samsung,pins
  89       - type: object
  90         patternProperties:
  91           "^[a-z0-9-]+-pins$":
  92             $ref: samsung,pinctrl-pins-cfg.yaml
  93
  94         additionalProperties: false
  95
  96   "^(initial|sleep)-state$":
  97     type: object
  98     additionalProperties: false
  99
 100     patternProperties:
 101       "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
 102         $ref: samsung,pinctrl-pins-cfg.yaml
 103
 104         properties:
 105           samsung,pins:
 106             description: See samsung,pinctrl-pins-cfg.yaml
 107             $ref: /schemas/types.yaml#/definitions/string-array
 108             maxItems: 1
 109
 110         required:
 111           - samsung,pins
 112
 113         unevaluatedProperties: false
 114
 115 required:
 116   - compatible
 117   - reg
 118
 119 allOf:
 120   - $ref: "pinctrl.yaml#"
 121   - if:
 122       properties:
 123         compatible:
 124           contains:
 125             const: samsung,exynos5433-pinctrl
 126     then:
 127       properties:
 128         reg:
 129           minItems: 1
 130           maxItems: 2
 131     else:
 132       properties:
 133         reg:
 134           minItems: 1
 135           maxItems: 1
 136
 137 additionalProperties: false
 138
 139 examples:
 140   - |
 141     pinctrl@7f008000 {
 142         compatible = "samsung,s3c64xx-pinctrl";
 143         reg = <0x7f008000 0x1000>;
 144         interrupt-parent = <&vic1>;
 145         interrupts = <21>;
 146
 147         wakeup-interrupt-controller {
 148             compatible = "samsung,s3c64xx-wakeup-eint";
 149             interrupts-extended = <&vic0 0>,
 150                                   <&vic0 1>,
 151                                   <&vic1 0>,
 152                                   <&vic1 1>;
 153         };
 154
 155         /* Pin bank with external GPIO or muxed external wake-up interrupts */
 156         gpa-gpio-bank {
 157             gpio-controller;
 158             #gpio-cells = <2>;
 159             interrupt-controller;
 160             #interrupt-cells = <2>;
 161         };
 162
 163         // ...
 164
 165         uart0-data-pins {
 166             samsung,pins = "gpa-0", "gpa-1";
 167             samsung,pin-function = <2>;
 168             samsung,pin-pud = <0>;
 169         };
 170
 171         // ...
 172     };
 173
 174   - |
 175     #include <dt-bindings/interrupt-controller/arm-gic.h>
 176
 177     pinctrl@11400000 {
 178         compatible = "samsung,exynos4210-pinctrl";
 179         reg = <0x11400000 0x1000>;
 180         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 181
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&sleep0>;
 184
 185         /* Pin bank with external GPIO or muxed external wake-up interrupts */
 186         gpa0-gpio-bank {
 187             gpio-controller;
 188             #gpio-cells = <2>;
 189             interrupt-controller;
 190             #interrupt-cells = <2>;
 191         };
 192
 193         // ...
 194
 195         uart0-data-pins {
 196             samsung,pins = "gpa0-0", "gpa0-1";
 197             samsung,pin-function = <2>;
 198             samsung,pin-pud = <0>;
 199             samsung,pin-drv = <0>;
 200         };
 201
 202         // ...
 203
 204         sleep0: sleep-state {
 205             gpa0-0-pin {
 206                 samsung,pins = "gpa0-0";
 207                 samsung,pin-con-pdn = <2>;
 208                 samsung,pin-pud-pdn = <0>;
 209             };
 210
 211             gpa0-1-pin {
 212                 samsung,pins = "gpa0-1";
 213                 samsung,pin-con-pdn = <0>;
 214                 samsung,pin-pud-pdn = <0>;
 215             };
 216
 217             // ...
 218         };
 219     };
 220
 221   - |
 222     #include <dt-bindings/interrupt-controller/arm-gic.h>
 223
 224     pinctrl@11000000 {
 225         compatible = "samsung,exynos4210-pinctrl";
 226         reg = <0x11000000 0x1000>;
 227         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 228
 229         wakeup-interrupt-controller {
 230             compatible = "samsung,exynos4210-wakeup-eint";
 231             interrupt-parent = <&gic>;
 232             interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 233         };
 234
 235         /* Pin bank with external GPIO or muxed external wake-up interrupts */
 236         gpj0-gpio-bank {
 237             gpio-controller;
 238             #gpio-cells = <2>;
 239             interrupt-controller;
 240             #interrupt-cells = <2>;
 241         };
 242
 243         /* Pin bank without external interrupts */
 244         gpy0-gpio-bank {
 245             gpio-controller;
 246             #gpio-cells = <2>;
 247         };
 248
 249         /* Pin bank with external direct wake-up interrupts */
 250         gpx0-gpio-bank {
 251             gpio-controller;
 252             #gpio-cells = <2>;
 253
 254             interrupt-controller;
 255             interrupt-parent = <&gic>;
 256             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 257                          <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 258                          <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 259                          <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 260                          <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
 261                          <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
 262                          <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
 263                          <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 264             #interrupt-cells = <2>;
 265         };
 266
 267         // ...
 268
 269         sd0-clk-pins {
 270             samsung,pins = "gpk0-0";
 271             samsung,pin-function = <2>;
 272             samsung,pin-pud = <0>;
 273             samsung,pin-drv = <3>;
 274         };
 275
 276         sd4-bus-width8-pins {
 277             part-1-pins {
 278                 samsung,pins = "gpk0-3", "gpk0-4",
 279                                "gpk0-5", "gpk0-6";
 280                 samsung,pin-function = <3>;
 281                 samsung,pin-pud = <3>;
 282                 samsung,pin-drv = <3>;
 283             };
 284
 285             part-2-pins {
 286                 samsung,pins = "gpk1-3", "gpk1-4",
 287                                "gpk1-5", "gpk1-6";
 288                 samsung,pin-function = <4>;
 289                 samsung,pin-pud = <3>;
 290                 samsung,pin-drv = <3>;
 291             };
 292         };
 293
 294         // ...
 295
 296         otg-gp-pins {
 297             samsung,pins = "gpx3-3";
 298             samsung,pin-function = <1>;
 299             samsung,pin-pud = <0>;
 300             samsung,pin-drv = <0>;
 301             samsung,pin-val = <0>;
 302         };
 303     };
 304
 305   - |
 306     #include <dt-bindings/interrupt-controller/arm-gic.h>
 307
 308     pinctrl@10580000 {
 309         compatible = "samsung,exynos5433-pinctrl";
 310         reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
 311
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&initial_alive>;
 314
 315         wakeup-interrupt-controller {
 316             compatible = "samsung,exynos7-wakeup-eint";
 317             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 318         };
 319
 320         /* Pin bank with external direct wake-up interrupts */
 321         gpa0-gpio-bank {
 322             gpio-controller;
 323             #gpio-cells = <2>;
 324
 325             interrupt-controller;
 326             interrupt-parent = <&gic>;
 327             interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 328                          <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 329                          <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 330                          <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 331                          <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
 332                          <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
 333                          <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
 334                          <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 335             #interrupt-cells = <2>;
 336         };
 337
 338         // ...
 339
 340         te-irq-pins {
 341             samsung,pins = "gpf1-3";
 342             samsung,pin-function = <0xf>;
 343         };
 344
 345         // ..
 346
 347         initial_alive: initial-state {
 348             gpa0-0-pin {
 349                 samsung,pins = "gpa0-0";
 350                 samsung,pin-function = <0>;
 351                 samsung,pin-pud = <1>;
 352                 samsung,pin-drv = <0>;
 353             };
 354
 355             // ...
 356         };
 357     };
 358
 359   - |
 360     #include <dt-bindings/interrupt-controller/arm-gic.h>
 361
 362     pinctrl@114b0000 {
 363         compatible = "samsung,exynos5433-pinctrl";
 364         reg = <0x114b0000 0x1000>;
 365         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 366         power-domains = <&pd_aud>;
 367
 368         /* Pin bank with external GPIO or muxed external wake-up interrupts */
 369         gpz0-gpio-bank {
 370             gpio-controller;
 371             #gpio-cells = <2>;
 372             interrupt-controller;
 373             #interrupt-cells = <2>;
 374         };
 375
 376         // ...
 377
 378         i2s0-bus-pins {
 379             samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
 380                            "gpz0-4", "gpz0-5", "gpz0-6";
 381             samsung,pin-function = <2>;
 382             samsung,pin-pud = <0>;
 383             samsung,pin-drv = <0>;
 384         };
 385
 386         // ...
 387     };