smb: client: Fix minor whitespace errors and warnings
[linux-modified.git] / Documentation / devicetree / bindings / pinctrl / qcom,sm6115-lpass-lpi-pinctrl.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
8
9 maintainers:
10   - Konrad Dybcio <konradybcio@kernel.org>
11   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
12
13 description:
14   Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
15   (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
16
17 properties:
18   compatible:
19     const: qcom,sm6115-lpass-lpi-pinctrl
20
21   reg:
22     items:
23       - description: LPASS LPI TLMM Control and Status registers
24       - description: LPASS LPI MCC registers
25
26   clocks:
27     items:
28       - description: LPASS Audio voting clock
29
30   clock-names:
31     items:
32       - const: audio
33
34   gpio-controller: true
35
36   "#gpio-cells":
37     description: Specifying the pin number and flags, as defined in
38       include/dt-bindings/gpio/gpio.h
39     const: 2
40
41   gpio-ranges:
42     maxItems: 1
43
44 patternProperties:
45   "-state$":
46     oneOf:
47       - $ref: "#/$defs/qcom-sm6115-lpass-state"
48       - patternProperties:
49           "-pins$":
50             $ref: "#/$defs/qcom-sm6115-lpass-state"
51         additionalProperties: false
52
53 $defs:
54   qcom-sm6115-lpass-state:
55     type: object
56     description:
57       Pinctrl node's client devices use subnodes for desired pin configuration.
58       Client device subnodes use below standard properties.
59     $ref: /schemas/pinctrl/pincfg-node.yaml
60
61     properties:
62       pins:
63         description:
64           List of gpio pins affected by the properties specified in this
65           subnode.
66         items:
67           pattern: "^gpio([0-9]|1[0-8])$"
68
69       function:
70         enum: [ dmic01_clk, dmic01_data, dmic23_clk, dmic23_data, gpio, i2s1_clk,
71                 i2s1_data, i2s1_ws, i2s2_clk, i2s2_data, i2s2_ws, i2s3_clk,
72                 i2s3_data, i2s3_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
73                 swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_mclk ]
74         description:
75           Specify the alternative function to be configured for the specified
76           pins.
77
78       drive-strength:
79         enum: [2, 4, 6, 8, 10, 12, 14, 16]
80         default: 2
81         description:
82           Selects the drive strength for the specified pins, in mA.
83
84       slew-rate:
85         enum: [0, 1, 2, 3]
86         default: 0
87         description: |
88           0: No adjustments
89           1: Higher Slew rate (faster edges)
90           2: Lower Slew rate (slower edges)
91           3: Reserved (No adjustments)
92
93       bias-bus-hold: true
94       bias-pull-down: true
95       bias-pull-up: true
96       bias-disable: true
97       input-enable: true
98       output-high: true
99       output-low: true
100
101     required:
102       - pins
103       - function
104
105     additionalProperties: false
106
107 allOf:
108   - $ref: pinctrl.yaml#
109
110 required:
111   - compatible
112   - reg
113   - clocks
114   - clock-names
115   - gpio-controller
116   - "#gpio-cells"
117   - gpio-ranges
118
119 additionalProperties: false
120
121 examples:
122   - |
123     #include <dt-bindings/sound/qcom,q6afe.h>
124
125     lpass_tlmm: pinctrl@a7c0000 {
126         compatible = "qcom,sm6115-lpass-lpi-pinctrl";
127         reg = <0x0a7c0000 0x20000>,
128               <0x0a950000 0x10000>;
129         clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
130         clock-names = "audio";
131
132         gpio-controller;
133         #gpio-cells = <2>;
134         gpio-ranges = <&lpass_tlmm 0 0 19>;
135     };