1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
8 Low Power Island (LPI) TLMM block
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 This binding describes the Top Level Mode Multiplexer block found in the
15 LPASS LPI IP on most Qualcomm SoCs
19 const: qcom,sc7280-lpass-lpi-pinctrl
21 qcom,adsp-bypass-mode:
23 Tells ADSP is in bypass mode.
33 description: Specifying the pin number and flags, as defined in
34 include/dt-bindings/gpio/gpio.h
40 #PIN CONFIGURATION NODES
45 Pinctrl node's client devices use subnodes for desired pin configuration.
46 Client device subnodes use below standard properties.
47 $ref: "/schemas/pinctrl/pincfg-node.yaml"
52 List of gpio pins affected by the properties specified in this
56 - pattern: "^gpio([0-9]|[1-9][0-9])$"
61 enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,
62 qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,
63 dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,
64 i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,
65 dmic3_data, i2s2_data ]
67 Specify the alternative function to be configured for the specified
71 enum: [2, 4, 6, 8, 10, 12, 14, 16]
74 Selects the drive strength for the specified pins, in mA.
81 1: Higher Slew rate (faster edges)
82 2: Lower Slew rate (slower edges)
83 3: Reserved (No adjustments)
99 additionalProperties: false
108 additionalProperties: false
112 lpass_tlmm: pinctrl@33c0000 {
113 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
114 reg = <0x33c0000 0x20000>,
118 gpio-ranges = <&lpass_tlmm 0 0 15>;