Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,qcm2290-tlmm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies, Inc. QCM2290 TLMM block
   8
   9 maintainers:
  10   - Shawn Guo <shawn.guo@linaro.org>
  11
  12 description:
  13   Top Level Mode Multiplexer pin controller in Qualcomm QCM2290 SoC.
  14
  15 properties:
  16   compatible:
  17     const: qcom,qcm2290-tlmm
  18
  19   reg:
  20     maxItems: 1
  21
  22   interrupts:
  23     maxItems: 1
  24
  25   interrupt-controller: true
  26   "#interrupt-cells": true
  27   gpio-controller: true
  28   "#gpio-cells": true
  29   gpio-ranges: true
  30   wakeup-parent: true
  31
  32 patternProperties:
  33   "-state$":
  34     oneOf:
  35       - $ref: "#/$defs/qcom-qcm2290-tlmm-state"
  36       - patternProperties:
  37           "-pins$":
  38             $ref: "#/$defs/qcom-qcm2290-tlmm-state"
  39         additionalProperties: false
  40
  41 $defs:
  42   qcom-qcm2290-tlmm-state:
  43     type: object
  44     description:
  45       Pinctrl node's client devices use subnodes for desired pin configuration.
  46       Client device subnodes use below standard properties.
  47     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  48     unevaluatedProperties: false
  49
  50     properties:
  51       pins:
  52         description:
  53           List of gpio pins affected by the properties specified in this
  54           subnode.
  55         items:
  56           oneOf:
  57             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-6])$"
  58             - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
  59                       sdc2_clk, sdc2_cmd, sdc2_data ]
  60         minItems: 1
  61         maxItems: 36
  62
  63       function:
  64         description:
  65           Specify the alternative function to be configured for the specified
  66           pins.
  67
  68         enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,
  69                 cci_timer0, cci_timer1, cci_timer2, cci_timer3, char_exec,
  70                 cri_trng, cri_trng0, cri_trng1, dac_calib, dbg_out, ddr_bist,
  71                 ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2,
  72                 gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx,
  73                 jitter_bist, mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1,
  74                 mpm_pwr, mss_lte, m_voc, nav_gpio, pa_indicator, pbs0, pbs1,
  75                 pbs2, pbs3, pbs4, pbs5, pbs6, pbs7, pbs8, pbs9, pbs10, pbs11,
  76                 pbs12, pbs13, pbs14, pbs15, pbs_out, phase_flag, pll_bist,
  77                 pll_bypassnl, pll_reset, prng_rosc, pwm_0, pwm_1, pwm_2, pwm_3,
  78                 pwm_4, pwm_5, pwm_6, pwm_7, pwm_8, pwm_9, qdss_cti, qdss_gpio,
  79                 qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb, sdc2_tb, sd_write,
  80                 ssbi_wtr1, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm,
  81                 uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
  82                 uim2_data, uim2_present, uim2_reset, usb_phy, vfr_1,
  83                 vsense_trigger, wlan1_adc0, wlan1_adc1 ]
  84
  85     required:
  86       - pins
  87
  88 allOf:
  89   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
  90
  91 required:
  92   - compatible
  93   - reg
  94
  95 additionalProperties: false
  96
  97 examples:
  98   - |
  99     #include <dt-bindings/interrupt-controller/arm-gic.h>
 100     tlmm: pinctrl@500000 {
 101         compatible = "qcom,qcm2290-tlmm";
 102         reg = <0x500000 0x300000>;
 103         interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
 104         gpio-controller;
 105         #gpio-cells = <2>;
 106         interrupt-controller;
 107         #interrupt-cells = <2>;
 108         gpio-ranges = <&tlmm 0 0 127>;
 109
 110         sdc2_on_state: sdc2-on-state {
 111             clk-pins {
 112                 pins = "sdc2_clk";
 113                 bias-disable;
 114                 drive-strength = <16>;
 115             };
 116
 117             cmd-pins {
 118                 pins = "sdc2_cmd";
 119                 bias-pull-up;
 120                 drive-strength = <10>;
 121             };
 122
 123             data-pins {
 124                 pins = "sdc2_data";
 125                 bias-pull-up;
 126                 drive-strength = <10>;
 127             };
 128         };
 129     };