1 Qualcomm PMIC GPIO block
3 This binding describes the GPIO block(s) found in the 8xxx series of
9 Definition: must be one of:
23 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
24 if the device is on an spmi bus or an ssbi bus respectively
28 Value type: <prop-encoded-array>
29 Definition: Register base of the GPIO block and length.
33 Value type: <prop-encoded-array>
34 Definition: Must contain an array of encoded interrupt specifiers for
40 Definition: Mark the device node as a GPIO controller
45 Definition: Must be 2;
46 the first cell will be used to define gpio number and the
47 second denotes the flags for this gpio
49 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
50 a general description of GPIO and interrupt bindings.
52 Please refer to pinctrl-bindings.txt in this directory for details of the
53 common pinctrl bindings used by client devices, including the meaning of the
54 phrase "pin configuration node".
56 The pin configuration nodes act as a container for an arbitrary number of
57 subnodes. Each of these subnodes represents some desired configuration for a
58 pin or a list of pins. This configuration can include the
59 mux function to select on those pin(s), and various pin configuration
60 parameters, as listed below.
65 The name of each subnode is not important; all subnodes should be enumerated
66 and processed purely based on their content.
68 Each subnode only affects those parameters that are explicitly listed. In
69 other words, a subnode that lists a mux function but no pin configuration
70 parameters implies no information about any pin configuration parameters.
71 Similarly, a pin subnode that describes a pullup parameter implies no
72 information about e.g. the mux function.
74 The following generic properties as defined in pinctrl-bindings.txt are valid
75 to specify in a pin configuration subnode:
79 Value type: <string-array>
80 Definition: List of gpio pins affected by the properties specified in
81 this subnode. Valid pins are:
82 gpio1-gpio4 for pm8005
83 gpio1-gpio6 for pm8018
84 gpio1-gpio12 for pm8038
85 gpio1-gpio40 for pm8058
86 gpio1-gpio4 for pm8916
87 gpio1-gpio38 for pm8917
88 gpio1-gpio44 for pm8921
89 gpio1-gpio36 for pm8941
90 gpio1-gpio22 for pm8994
91 gpio1-gpio26 for pm8998
92 gpio1-gpio22 for pma8084
93 gpio1-gpio10 for pmi8994
98 Definition: Specify the alternative function to be configured for the
99 specified pins. Valid values are:
108 And following values are supported by LV/MV GPIO subtypes:
115 Definition: The specified pins should be configured as no pull.
120 Definition: The specified pins should be configured as pull down.
125 Definition: The specified pins should be configured as pull up.
127 - qcom,pull-up-strength:
130 Definition: Specifies the strength to use for pull up, if selected.
131 Valid values are; as defined in
132 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
133 1: 30uA (PMIC_GPIO_PULL_UP_30)
134 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
135 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
136 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
137 If this property is omitted 30uA strength will be used if
140 - bias-high-impedance:
143 Definition: The specified pins will put in high-Z mode and disabled.
148 Definition: The specified pins are put in input mode.
153 Definition: The specified pins are configured in output mode, driven
159 Definition: The specified pins are configured in output mode, driven
165 Definition: Selects the power source for the specified pins. Valid
166 power sources are defined per chip in
167 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
169 - qcom,drive-strength:
172 Definition: Selects the drive strength for the specified pins. Value
174 0: no (PMIC_GPIO_STRENGTH_NO)
175 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
176 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
177 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
178 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
183 Definition: The specified pins are configured in push-pull mode.
188 Definition: The specified pins are configured in open-drain mode.
193 Definition: The specified pins are configured in open-source mode.
198 Definition: The specified pins are configured in analog-pass-through mode.
203 Definition: Selects ATEST rail to route to GPIO when it's configured
204 in analog-pass-through mode.
205 Valid values are 1-4 corresponding to ATEST1 to ATEST4.
210 Definition: Selects DTEST rail to route to GPIO when it's configured
212 Valid values are 1-4 corresponding to DTEST1 to DTEST4.
216 pm8921_gpio: gpio@150 {
217 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
219 interrupts = <192 1>, <193 1>, <194 1>,
220 <195 1>, <196 1>, <197 1>,
221 <198 1>, <199 1>, <200 1>,
222 <201 1>, <202 1>, <203 1>,
223 <204 1>, <205 1>, <206 1>,
224 <207 1>, <208 1>, <209 1>,
225 <210 1>, <211 1>, <212 1>,
226 <213 1>, <214 1>, <215 1>,
227 <216 1>, <217 1>, <218 1>,
228 <219 1>, <220 1>, <221 1>,
229 <222 1>, <223 1>, <224 1>,
230 <225 1>, <226 1>, <227 1>,
231 <228 1>, <229 1>, <230 1>,
232 <231 1>, <232 1>, <233 1>,
238 pm8921_gpio_keys: gpio-keys {
240 pins = "gpio20", "gpio21";
246 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
247 power-source = <PM8921_GPIO_S4>;