Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8996-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm MSM8996 TLMM pin controller
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8996 SoC.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8996-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     maxItems: 1
  25
  26   interrupt-controller: true
  27   "#interrupt-cells": true
  28   gpio-controller: true
  29   "#gpio-cells": true
  30   gpio-ranges: true
  31   wakeup-parent: true
  32
  33   gpio-reserved-ranges:
  34     minItems: 1
  35     maxItems: 75
  36
  37   gpio-line-names:
  38     maxItems: 150
  39
  40 patternProperties:
  41   "-state$":
  42     oneOf:
  43       - $ref: "#/$defs/qcom-msm8996-tlmm-state"
  44       - patternProperties:
  45           "-pins$":
  46             $ref: "#/$defs/qcom-msm8996-tlmm-state"
  47         additionalProperties: false
  48
  49 $defs:
  50   qcom-msm8996-tlmm-state:
  51     type: object
  52     description:
  53       Pinctrl node's client devices use subnodes for desired pin configuration.
  54       Client device subnodes use below standard properties.
  55     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  56     unevaluatedProperties: false
  57
  58     properties:
  59       pins:
  60         description:
  61           List of gpio pins affected by the properties specified in this
  62           subnode.
  63         items:
  64           oneOf:
  65             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
  66             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
  67                       sdc2_cmd, sdc2_data ]
  68         minItems: 1
  69         maxItems: 36
  70
  71       function:
  72         description:
  73           Specify the alternative function to be configured for the specified
  74           pins.
  75
  76         enum: [ gpio, blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,
  77                 bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,
  78                 qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,
  79                 dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,
  80                 blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,
  81                 mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,
  82                 atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio,
  83                 atest_char, cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8,
  84                 qdss_tracedata_b, pll_reset, qdss_stm6, qdss_stm5, qdss_stm4,
  85                 atest_usb2, cci_i2c, qdss_stm3, dac_calib3, atest_usb23,
  86                 atest_char3, dac_calib4, qdss_stm2, atest_usb22, atest_char2,
  87                 qdss_stm1, dac_calib5, atest_usb21, atest_char1, dbg_out,
  88                 qdss_stm0, dac_calib6, atest_usb20, atest_char0, dac_calib10,
  89                 qdss_stm10, qdss_cti_trig_in_a, cci_timer4, blsp_spi6,
  90                 blsp_uart6, blsp_uim6, blsp2_spi, qdss_stm9,
  91                 qdss_cti_trig_out_a, dac_calib11, qdss_stm8, cci_timer0,
  92                 qdss_stm13, dac_calib7, cci_timer1, qdss_stm12, dac_calib8,
  93                 cci_timer2, blsp1_spi, qdss_stm11, dac_calib9, cci_timer3,
  94                 cci_async, dac_calib12, blsp_i2c6, qdss_tracectl_a,
  95                 dac_calib13, qdss_traceclk_a, dac_calib14, dac_calib15,
  96                 hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, dac_calib17,
  97                 hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, dac_calib19,
  98                 hdmi_hot, dac_calib20, dac_calib21, pci_e0, dac_calib22,
  99                 dac_calib23, dac_calib24, tsif1_sync, dac_calib25, sd_write,
 100                 tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, qdss_cti,
 101                 blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, uim3,
 102                 blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,
 103                 blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,
 104                 qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11,
 105                 blsp_uart11, blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a,
 106                 blsp_i2c11, cri_trng0, cri_trng1, cri_trng, qdss_stm18,
 107                 pri_mi2s, qdss_stm17, blsp_spi4, blsp_uart4, blsp_uim4,
 108                 qdss_stm16, qdss_stm15, blsp_i2c4, qdss_stm14, dac_calib26,
 109                 spkr_i2s, audio_ref, lpass_slimbus, isense_dbg, tsense_pwm1,
 110                 tsense_pwm2, btfm_slimbus, ter_mi2s, qdss_stm22, qdss_stm21,
 111                 qdss_stm20, qdss_stm19, gcc_gp1_clk_b, sec_mi2s, blsp_spi5,
 112                 blsp_uart5, blsp_uim5, gcc_gp2_clk_b, gcc_gp3_clk_b, blsp_i2c5,
 113                 blsp_spi12, blsp_uart12, blsp_uim12, qdss_stm25, qdss_stm31,
 114                 blsp_i2c12, qdss_stm30, qdss_stm29, tsif1_clk, qdss_stm28,
 115                 tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, qdss_traceclk_b,
 116                 tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, sdc4_clk,
 117                 qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,
 118                 sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,
 119                 ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b,
 120                 blsp11_uart_rx_b, blsp11_i2c_sda_b, prng_rosc,
 121                 blsp11_i2c_scl_b, uim2, uim1, uim_batt, pci_e2, pa_indicator,
 122                 adsp_ext, ddr_bist, qdss_tracedata_11, qdss_tracedata_12,
 123                 modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, qspi_cs, ssbi2,
 124                 ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3 ]
 125
 126     required:
 127       - pins
 128
 129 allOf:
 130   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
 131
 132 required:
 133   - compatible
 134   - reg
 135
 136 additionalProperties: false
 137
 138 examples:
 139   - |
 140     #include <dt-bindings/interrupt-controller/arm-gic.h>
 141
 142     tlmm: pinctrl@1010000 {
 143         compatible = "qcom,msm8996-pinctrl";
 144         reg = <0x01010000 0x300000>;
 145         interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 146         gpio-controller;
 147         gpio-ranges = <&tlmm 0 0 150>;
 148         #gpio-cells = <2>;
 149         interrupt-controller;
 150         #interrupt-cells = <2>;
 151
 152         blsp1-spi1-default-state {
 153             spi-pins {
 154                 pins = "gpio0", "gpio1", "gpio3";
 155                 function = "blsp_spi1";
 156                 drive-strength = <12>;
 157                 bias-disable;
 158             };
 159
 160             cs-pins {
 161                 pins = "gpio2";
 162                 function = "gpio";
 163                 drive-strength = <16>;
 164                 bias-disable;
 165                 output-high;
 166             };
 167         };
 168
 169         blsp1-spi1-sleep-state {
 170             pins = "gpio0", "gpio1", "gpio2", "gpio3";
 171             function = "gpio";
 172             drive-strength = <2>;
 173             bias-pull-down;
 174         };
 175     };