1 Qualcomm MDM9615 TLMM block
3 This binding describes the Top Level Mode Multiplexer block found in the
9 Definition: must be "qcom,mdm9615-pinctrl"
13 Value type: <prop-encoded-array>
14 Definition: the base address and size of the TLMM register space.
18 Value type: <prop-encoded-array>
19 Definition: should specify the TLMM summary IRQ.
21 - interrupt-controller:
24 Definition: identifies this node as an interrupt controller
29 Definition: must be 2. Specifying the pin number and flags, as defined
30 in <dt-bindings/interrupt-controller/irq.h>
35 Definition: identifies this node as a gpio controller
40 Definition: must be 2. Specifying the pin number and flags, as defined
41 in <dt-bindings/gpio/gpio.h>
43 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
44 a general description of GPIO and interrupt bindings.
46 Please refer to pinctrl-bindings.txt in this directory for details of the
47 common pinctrl bindings used by client devices, including the meaning of the
48 phrase "pin configuration node".
50 The pin configuration nodes act as a container for an arbitrary number of
51 subnodes. Each of these subnodes represents some desired configuration for a
52 pin, a group, or a list of pins or groups. This configuration can include the
53 mux function to select on those pin(s)/group(s), and various pin configuration
54 parameters, such as pull-up, drive strength, etc.
57 PIN CONFIGURATION NODES:
59 The name of each subnode is not important; all subnodes should be enumerated
60 and processed purely based on their content.
62 Each subnode only affects those parameters that are explicitly listed. In
63 other words, a subnode that lists a mux function but no pin configuration
64 parameters implies no information about any pin configuration parameters.
65 Similarly, a pin subnode that describes a pullup parameter implies no
66 information about e.g. the mux function.
69 The following generic properties as defined in pinctrl-bindings.txt are valid
70 to specify in a pin configuration subnode:
74 Value type: <string-array>
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode. Valid pins are:
82 Definition: Specify the alternative function to be configured for the
85 gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
86 sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
92 Definition: The specified pins should be configued as no pull.
97 Definition: The specified pins should be configued as pull down.
102 Definition: The specified pins should be configued as pull up.
107 Definition: The specified pins are configured in output mode, driven
113 Definition: The specified pins are configured in output mode, driven
119 Definition: Selects the drive strength for the specified pins, in mA.
120 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
124 msmgpio: pinctrl@800000 {
125 compatible = "qcom,mdm9615-pinctrl";
126 reg = <0x800000 0x4000>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
132 interrupts = <0 16 0x4>;
134 gsbi8_uart: gsbi8-uart {
136 pins = "gpio34", "gpio35";
142 drive-strength = <4>;
148 drive-strength = <2>;