Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies, Inc. IPQ6018 TLMM block
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11
  12 description:
  13   Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.
  14
  15 properties:
  16   compatible:
  17     const: qcom,ipq6018-pinctrl
  18
  19   reg:
  20     maxItems: 1
  21
  22   interrupts:
  23     maxItems: 1
  24
  25   interrupt-controller: true
  26   "#interrupt-cells": true
  27   gpio-controller: true
  28   "#gpio-cells": true
  29   gpio-ranges: true
  30
  31 patternProperties:
  32   "-state$":
  33     oneOf:
  34       - $ref: "#/$defs/qcom-ipq6018-tlmm-state"
  35       - patternProperties:
  36           "-pins$":
  37             $ref: "#/$defs/qcom-ipq6018-tlmm-state"
  38         additionalProperties: false
  39
  40 $defs:
  41   qcom-ipq6018-tlmm-state:
  42     description:
  43       Pinctrl node's client devices use subnodes for desired pin configuration.
  44       Client device subnodes use below standard properties.
  45     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  46     unevaluatedProperties: false
  47
  48     properties:
  49       pins:
  50         description:
  51           List of gpio pins affected by the properties specified in this
  52           subnode.
  53         items:
  54           oneOf:
  55             - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
  56             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
  57                       sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
  58                       qdsd_data3 ]
  59         minItems: 1
  60         maxItems: 16
  61
  62       function:
  63         description:
  64           Specify the alternative function to be configured for the specified
  65           pins.
  66         enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
  67                 atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
  68                 atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
  69                 atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,
  70                 blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,
  71                 blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
  72                 blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
  73                 blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
  74                 blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
  75                 cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
  76                 cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
  77                 dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
  78                 flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
  79                 gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0,
  80                 gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2,
  81                 ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc,
  82                 nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s,
  83                 pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
  84                 pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
  85                 pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,
  86                 qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
  87                 qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
  88                 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
  89                 qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card,
  90                 sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,
  91                 uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
  92
  93     required:
  94       - pins
  95
  96 allOf:
  97   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
  98
  99 required:
 100   - compatible
 101   - reg
 102
 103 additionalProperties: false
 104
 105 examples:
 106   - |
 107     #include <dt-bindings/interrupt-controller/arm-gic.h>
 108     tlmm: pinctrl@1000000 {
 109         compatible = "qcom,ipq6018-pinctrl";
 110         reg = <0x01000000 0x300000>;
 111         interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 112         interrupt-controller;
 113         #interrupt-cells = <2>;
 114         gpio-controller;
 115         #gpio-cells = <2>;
 116         gpio-ranges = <&tlmm 0 0 80>;
 117
 118         serial3-state {
 119             pins = "gpio44", "gpio45";
 120             function = "blsp2_uart";
 121             drive-strength = <8>;
 122             bias-pull-down;
 123         };
 124     };