Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Mediatek MT7986 Pin Controller
   8
   9 maintainers:
  10   - Sean Wang <sean.wang@kernel.org>
  11
  12 description: |+
  13   The MediaTek's MT7986 Pin controller is used to control SoC pins.
  14
  15 properties:
  16   compatible:
  17     enum:
  18       - mediatek,mt7986a-pinctrl
  19       - mediatek,mt7986b-pinctrl
  20
  21   reg:
  22     minItems: 8
  23     maxItems: 8
  24
  25   reg-names:
  26     items:
  27       - const: gpio
  28       - const: iocfg_rt
  29       - const: iocfg_rb
  30       - const: iocfg_lt
  31       - const: iocfg_lb
  32       - const: iocfg_tr
  33       - const: iocfg_tl
  34       - const: eint
  35
  36   gpio-controller: true
  37
  38   "#gpio-cells":
  39     const: 2
  40     description: |
  41       Number of cells in GPIO specifier. Since the generic GPIO
  42       binding is used, the amount of cells must be specified as 2. See the below
  43       mentioned gpio binding representation for description of particular cells.
  44
  45   gpio-ranges:
  46     minItems: 1
  47     maxItems: 5
  48     description: |
  49       GPIO valid number range.
  50
  51   interrupt-controller: true
  52
  53   interrupts:
  54     maxItems: 1
  55
  56   "#interrupt-cells":
  57     const: 2
  58
  59 allOf:
  60   - $ref: "pinctrl.yaml#"
  61
  62 required:
  63   - compatible
  64   - reg
  65   - reg-names
  66   - gpio-controller
  67   - "#gpio-cells"
  68
  69 patternProperties:
  70   '-pins$':
  71     type: object
  72     additionalProperties: false
  73
  74     patternProperties:
  75       '.*mux.*':
  76         type: object
  77         additionalProperties: false
  78         description: |
  79           pinmux configuration nodes.
  80
  81           The following table shows the effective values of "group", "function"
  82           properties and chip pinout pins
  83
  84           groups            function    pins (in pin#)
  85           ---------------------------------------------------------------------
  86           "watchdog"        "watchdog"  0
  87           "wifi_led"        "led"       1, 2
  88           "i2c"             "i2c"       3, 4
  89           "uart1_0"         "uart"      7, 8, 9, 10
  90           "uart1_rx_tx"     "uart"      42, 43
  91           "uart1_cts_rts"   "uart"      44, 45
  92           "pcie_clk"        "pcie"      9
  93           "pcie_wake"       "pcie"      10
  94           "spi1_0"          "spi"       11, 12, 13, 14
  95           "pwm1_1"          "pwm"       20,
  96           "pwm0"            "pwm"       21,
  97           "pwm1_0"          "pwm"       22,
  98           "snfi"            "flash"     23, 24, 25, 26, 27, 28
  99           "spi1_2"          "spi"       29, 30, 31, 32
 100           "emmc_45"         "emmc"      22, 23, 24, 25, 26, 27, 28, 29, 30,
 101                                         31, 32
 102           "spi1_1"          "spi"       23, 24, 25, 26
 103           "uart1_2_rx_tx"   "uart"      29, 30
 104           "uart1_2_cts_rts" "uart"      31, 32
 105           "uart1_1"         "uart"      23, 24, 25, 26
 106           "uart2_0_rx_tx"   "uart"      29, 30
 107           "uart2_0_cts_rts" "uart"      31, 32
 108           "spi0"            "spi"       33, 34, 35, 36
 109           "spi0_wp_hold"    "spi"       37, 38
 110           "uart1_3_rx_tx"   "uart"      35, 36
 111           "uart1_3_cts_rts" "uart"      37, 38
 112           "uart2_1"         "uart"      33, 34, 35, 36
 113           "spi1_3"          "spi"       33, 34, 35, 36
 114           "uart0"           "uart"      39, 40
 115           "pcie_pereset"    "pcie"      41
 116           "uart1"           "uart"      42, 43, 44, 45
 117           "uart2"           "uart"      46, 47, 48, 49
 118           "emmc_51"         "emmc"      50, 51, 52, 53, 54, 55, 56, 57, 57,
 119                                         59, 60, 61
 120           "pcm"             "audio"     62, 63, 64, 65
 121           "i2s"             "audio"     62, 63, 64, 65
 122           "switch_int"      "eth"       66
 123           "mdc_mdio"        "eth"       67
 124           "wf_2g"           "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83
 125           "wf_5g"           "wifi"      91, 92, 93, 94, 95, 96, 97, 98, 99, 100
 126           "wf_dbdc"         "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
 127                                         84, 85
 128
 129         $ref: "/schemas/pinctrl/pinmux-node.yaml"
 130         properties:
 131           function:
 132             description: |
 133               A string containing the name of the function to mux to the group.
 134               There is no "audio", "pcie" functions on mt7986b, you can only use
 135               those functions on mt7986a.
 136             enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
 137                    watchdog, wifi]
 138           groups:
 139             description: |
 140               An array of strings. Each string contains the name of a group.
 141               There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",
 142               and "i2s" groups on mt7986b, you can only use those groups on
 143               mt7986a.
 144         required:
 145           - function
 146           - groups
 147
 148         allOf:
 149           - if:
 150               properties:
 151                 function:
 152                   const: audio
 153             then:
 154               properties:
 155                 groups:
 156                   enum: [pcm, i2s]
 157           - if:
 158               properties:
 159                 function:
 160                   const: emmc
 161             then:
 162               properties:
 163                 groups:
 164                   enum: [emmc_45, emmc_51]
 165           - if:
 166               properties:
 167                 function:
 168                   const: eth
 169             then:
 170               properties:
 171                 groups:
 172                   enum: [switch_int, mdc_mdio]
 173           - if:
 174               properties:
 175                 function:
 176                   const: i2c
 177             then:
 178               properties:
 179                 groups:
 180                   enum: [i2c]
 181           - if:
 182               properties:
 183                 function:
 184                   const: led
 185             then:
 186               properties:
 187                 groups:
 188                   enum: [wifi_led]
 189           - if:
 190               properties:
 191                 function:
 192                   const: flash
 193             then:
 194               properties:
 195                 groups:
 196                   enum: [snfi]
 197           - if:
 198               properties:
 199                 function:
 200                   const: pcie
 201             then:
 202               properties:
 203                 groups:
 204                   enum: [pcie_clk, pcie_wake, pcie_pereset]
 205           - if:
 206               properties:
 207                 function:
 208                   const: pwm
 209             then:
 210               properties:
 211                 groups:
 212                   enum: [pwm0, pwm1_0, pwm1_1]
 213           - if:
 214               properties:
 215                 function:
 216                   const: spi
 217             then:
 218               properties:
 219                 groups:
 220                   enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3]
 221           - if:
 222               properties:
 223                 function:
 224                   const: uart
 225             then:
 226               properties:
 227                 groups:
 228                   items:
 229                     enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1,
 230                            uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx,
 231                            uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts,
 232                            uart2_1, uart0, uart1, uart2]
 233                   maxItems: 2
 234           - if:
 235               properties:
 236                 function:
 237                   const: watchdog
 238             then:
 239               properties:
 240                 groups:
 241                   enum: [watchdog]
 242           - if:
 243               properties:
 244                 function:
 245                   const: wifi
 246             then:
 247               properties:
 248                 groups:
 249                   items:
 250                     enum: [wf_2g, wf_5g, wf_dbdc]
 251                   maxItems: 3
 252       '.*conf.*':
 253         type: object
 254         additionalProperties: false
 255         description: |
 256           pinconf configuration nodes.
 257         $ref: "/schemas/pinctrl/pincfg-node.yaml"
 258
 259         properties:
 260           pins:
 261             description: |
 262               An array of strings. Each string contains the name of a pin.
 263               There is no PIN 41 to PIN 65 above on mt7686b, you can only use
 264               those pins on mt7986a.
 265             items:
 266               enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
 267                      GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
 268                      GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
 269                      GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
 270                      SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
 271                      SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
 272                      UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
 273                      UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
 274                      UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
 275                      EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
 276                      EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
 277                      PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
 278                      WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
 279                      WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
 280                      WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
 281                      WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
 282                      WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
 283                      WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
 284                      WF1_HB8]
 285             maxItems: 101
 286
 287           bias-disable: true
 288
 289           bias-pull-up: true
 290
 291           bias-pull-down: true
 292
 293           input-enable: true
 294
 295           input-disable: true
 296
 297           output-enable: true
 298
 299           output-low: true
 300
 301           output-high: true
 302
 303           input-schmitt-enable: true
 304
 305           input-schmitt-disable: true
 306
 307           drive-strength:
 308             enum: [2, 4, 6, 8, 10, 12, 14, 16]
 309
 310           mediatek,pull-up-adv:
 311             description: |
 312               Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
 313               Pull up setings for 2 pull resistors, R0 and R1. Valid arguments
 314               are described as below:
 315               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
 316               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
 317               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
 318               3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
 319             $ref: /schemas/types.yaml#/definitions/uint32
 320             enum: [0, 1, 2, 3]
 321
 322           mediatek,pull-down-adv:
 323             description: |
 324               Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
 325               Pull down setings for 2 pull resistors, R0 and R1. Valid arguments
 326               are described as below:
 327               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
 328               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
 329               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
 330               3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
 331             $ref: /schemas/types.yaml#/definitions/uint32
 332             enum: [0, 1, 2, 3]
 333
 334         required:
 335           - pins
 336
 337 additionalProperties: false
 338
 339 examples:
 340   - |
 341     #include <dt-bindings/interrupt-controller/irq.h>
 342     #include <dt-bindings/interrupt-controller/arm-gic.h>
 343
 344     soc {
 345       #address-cells = <2>;
 346       #size-cells = <2>;
 347       pio: pinctrl@1001f000 {
 348         compatible = "mediatek,mt7986a-pinctrl";
 349         reg = <0 0x1001f000 0 0x1000>,
 350               <0 0x11c30000 0 0x1000>,
 351               <0 0x11c40000 0 0x1000>,
 352               <0 0x11e20000 0 0x1000>,
 353               <0 0x11e30000 0 0x1000>,
 354               <0 0x11f00000 0 0x1000>,
 355               <0 0x11f10000 0 0x1000>,
 356               <0 0x1000b000 0 0x1000>;
 357         reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
 358                     "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
 359         gpio-controller;
 360         #gpio-cells = <2>;
 361         gpio-ranges = <&pio 0 0 100>;
 362         interrupt-controller;
 363         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 364         interrupt-parent = <&gic>;
 365         #interrupt-cells = <2>;
 366
 367         pcie_pins: pcie-pins {
 368           mux {
 369             function = "pcie";
 370             groups = "pcie_clk", "pcie_wake", "pcie_pereset";
 371           };
 372         };
 373
 374         pwm_pins: pwm-pins {
 375           mux {
 376             function = "pwm";
 377             groups = "pwm0", "pwm1_0";
 378           };
 379         };
 380
 381         spi0_pins: spi0-pins {
 382           mux {
 383             function = "spi";
 384             groups = "spi0", "spi0_wp_hold";
 385           };
 386         };
 387
 388         uart1_pins: uart1-pins {
 389           mux {
 390             function = "uart";
 391             groups = "uart1";
 392           };
 393         };
 394
 395         uart1_3_pins: uart1-3-pins {
 396           mux {
 397             function = "uart";
 398             groups = "uart1_3_rx_tx", "uart1_3_cts_rts";
 399           };
 400         };
 401
 402         uart2_pins: uart2-pins {
 403           mux {
 404             function = "uart";
 405             groups = "uart2";
 406           };
 407         };
 408
 409       };
 410     };