1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Canaan Kendryte K210 FPIOA Device Tree Bindings
10 - Damien Le Moal <damien.lemoal@wdc.com>
13 The Canaan Kendryte K210 SoC Fully Programmable IO Array (FPIOA)
14 controller allows assiging any of 256 possible functions to any of
15 48 IO pins of the SoC. Pin function configuration is performed on
20 const: canaan,k210-fpioa
25 Address and length of the register set for the FPIOA controller.
29 - description: Controller reference clock source
30 - description: APB interface clock source
40 canaan,k210-sysctl-power:
41 $ref: /schemas/types.yaml#/definitions/phandle-array
43 phandle of the K210 system controller node and offset of its
44 power domain control register.
49 $ref: /schemas/pinctrl/pinmux-node.yaml
51 FPIOA client devices use sub-nodes to define the desired pin
52 configuration. Client device sub-nodes use the pinux property
58 List of IO pins alternate functions. The values for each IO
59 pin is a combination of an IO pin number (0 to 47) with the
60 desired function for the IO pin. Functions are defined as
61 macros in include/dt-bindings/pinctrl/k210-fpioa.h.
62 The K210_FPIOA(IO pin, function) macro is provided to
63 facilitate the combination of IO pin numbers and functions.
68 additionalProperties: false
72 $ref: /schemas/pinctrl/pincfg-node.yaml
74 FPIOA client devices use sub-nodes to define the desired
75 configuration of pins. Client device sub-nodes use the
81 List of IO pins affected by the properties specified in this
82 subnode. IO pins are identified using the pin names "IO_xx".
83 Pin configuration nodes can also define the power domain to
84 be used for the SoC pin groups A0 (IO pins 0-5),
85 A1 (IO pins 6-11), A2 (IO pins 12-17), B0 (IO pins 18-23),
86 B1 (IO pins 24-29), B2 (IO pins 30-35), B3 (IO pins 30-35),
87 C0 (IO pins 36-41) and C1 (IO pins 42-47) using the
88 power-source property.
91 - pattern: "^(IO_([0-9]*))|(A[0-2])|(B[3-5])|(C[6-7])$"
92 - enum: [ IO_0, IO_1, IO_2, IO_3, IO_4, IO_5, IO_6, IO_7,
93 IO_8, IO_9, IO_10, IO_11, IO_12, IO_13, IO_14,
94 IO_15, IO_16, IO_17, IO_18, IO_19, IO_20, IO_21,
95 IO_22, IO_23, IO_24, IO_25, IO_26, IO_27, IO_28,
96 IO_29, IO_30, IO_31, IO_32, IO_33, IO_34, IO_35,
97 IO_36, IO_37, IO_38, IO_39, IO_40, IO_41, IO_42,
98 IO_43, IO_44, IO_45, IO_46, IO_47,
99 A0, A1, A2, B3, B4, B5, C6, C7 ]
108 drive-strength-microamp: true
114 input-schmitt-enable: true
116 input-schmitt-disable: true
118 input-polarity-invert:
120 Enable or disable pin input polarity inversion.
130 output-polarity-invert:
132 Enable or disable pin output polarity inversion.
138 additionalProperties: false
144 - canaan,k210-sysctl-power
146 additionalProperties: false
150 #include <dt-bindings/pinctrl/k210-fpioa.h>
151 #include <dt-bindings/clock/k210-clk.h>
152 #include <dt-bindings/reset/k210-rst.h>
154 fpioa: pinmux@502B0000 {
155 compatible = "canaan,k210-fpioa";
156 reg = <0x502B0000 0x100>;
157 clocks = <&sysclk K210_CLK_FPIOA>,
158 <&sysclk K210_CLK_APB0>;
159 clock-names = "ref", "pclk";
160 resets = <&sysrst K210_RST_FPIOA>;
161 canaan,k210-sysctl-power = <&sysctl 108>;
162 pinctrl-0 = <&jtag_pinctrl>;
163 pinctrl-names = "default";
165 jtag_pinctrl: jtag-pinmux {
166 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
167 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
168 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
169 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;