1 Broadcom Northstar plus (NSP) GPIO/PINCONF Controller
5 Must be "brcm,nsp-gpio-a"
8 Should contain the register physical address and length for each of
9 GPIO base, IO control registers
12 Must be two. The first cell is the GPIO pin number (within the
13 controller's pin space) and the second cell is used for the following:
14 bit[0]: polarity (0 for active high and 1 for active low)
17 Specifies that the node is a GPIO controller
20 Number of gpios supported (58x25 supports 32 and 58x23 supports 24)
26 - interrupt-controller:
27 Specifies that the node is an interrupt controller
30 Specifies the mapping between gpio controller and pin-controllers pins.
31 This requires 4 fields in cells defined as -
32 1. Phandle of pin-controller.
33 2. GPIO base pin offset.
34 3 Pin-control base pin offset.
35 4. number of gpio pins which are linearly mapped from pin base.
37 Supported generic PINCONF properties in child nodes:
39 The list of pins (within the controller's own pin space) that properties
40 in the node apply to. Pin names are "gpio-<pin>"
46 Enable internal pull up resistor
49 Enable internal pull down resistor
52 Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
56 gpioa: gpio@18000020 {
57 compatible = "brcm,nsp-gpio-a";
58 reg = <0x18000020 0x100>,
63 gpio-ranges = <&pinctrl 0 0 31>;
65 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
67 /* Hog a few default settings */
68 pinctrl-names = "default";