1 * Atmel PIO4 Controller
3 The Atmel PIO4 controller is used to select the function of a pin and to
7 - compatible: "atmel,sama5d2-pinctrl".
8 - reg: base address and length of the PIO controller.
9 - interrupts: interrupt outputs from the controller, one for each bank.
10 - interrupt-controller: mark the device node as an interrupt controller.
11 - #interrupt-cells: should be two.
12 - gpio-controller: mark the device node as a gpio controller.
13 - #gpio-cells: should be two.
15 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
16 a general description of GPIO and interrupt bindings.
18 Please refer to pinctrl-bindings.txt in this directory for details of the
19 common pinctrl bindings used by client devices.
22 Each node (or subnode) will list the pins it needs and how to configured these
26 pinmux = <PIN_NUMBER_PINMUX>;
31 - pinmux: integer array. Each integer represents a pin number plus mux and
32 ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
33 right representation of the pin.
36 - GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable,
37 bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable,
38 input-debounce, output-low, output-high.
39 - atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for
40 high drive. The default value is low drive.
44 #include <sama5d2-pinfunc.h>
48 pioA: pinctrl@fc038000 {
49 compatible = "atmel,sama5d2-pinctrl";
50 reg = <0xfc038000 0x600>;
51 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
52 <68 IRQ_TYPE_LEVEL_HIGH 7>,
53 <69 IRQ_TYPE_LEVEL_HIGH 7>,
54 <70 IRQ_TYPE_LEVEL_HIGH 7>;
56 #interrupt-cells = <2>;
61 pinctrl_i2c0_default: i2c0_default {
62 pinmux = <PIN_PD21__TWD0>,
67 pinctrl_led_gpio_default: led_gpio_default {
71 atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
74 pinctrl_sdmmc1_default: sdmmc1_default {
76 pinmux = <PIN_PA28__SDMMC1_CMD>,
77 <PIN_PA18__SDMMC1_DAT0>,
78 <PIN_PA19__SDMMC1_DAT1>,
79 <PIN_PA20__SDMMC1_DAT2>,
80 <PIN_PA21__SDMMC1_DAT3>;
85 pinmux = <PIN_PA22__SDMMC1_CK>,
86 <PIN_PA30__SDMMC1_CD>;