1 * Atmel AT91 Pinmux Controller
3 The AT91 Pinmux Controller, enables the IC
4 to share one PAD to several functional blocks. The sharing is done by
5 multiplexing the PAD input/output signals. For each PAD there are up to
6 8 muxing options (called periph modes). Since different modules require
7 different PAD settings (like pull up, keeper, etc) the contoller controls
8 also the PAD settings parameters.
10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
15 used for a specific device or function. This node represents both mux and config
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
20 Required properties for iomux controller:
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
24 configured in this periph mode. All the periph and bank need to be describe.
26 How to create such array:
28 Each column will represent the possible peripheral of the pinctrl
29 Each line will represent a pio bank
31 Take an example on the 9260
32 Peripheral: 2 ( A and B)
37 0xffffffff 0xffc00c3b /* pioA */
38 0xffffffff 0x7fff3ccf /* pioB */
39 0xffffffff 0x007fffff /* pioC */
41 For each peripheral/bank we will descibe in a u32 if a pin can be
42 configured in it by putting 1 to the pin bit (1 << pin)
44 Let's take the pioA on peripheral B
45 From the datasheet Table 10-2.
82 Required properties for pin configuration node:
83 - atmel,pins: 4 integers array, represents a group of pins mux and config
84 setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
85 The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
86 PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
89 PULL_UP (1 << 0): indicate this pin needs a pull up.
90 MULTIDRIVE (1 << 1): indicate this pin needs to be configured as multi-drive.
91 Multi-drive is equivalent to open-drain type output.
92 DEGLITCH (1 << 2): indicate this pin needs deglitch.
93 PULL_DOWN (1 << 3): indicate this pin needs a pull down.
94 DIS_SCHMIT (1 << 4): indicate this pin needs to the disable schmitt trigger.
95 DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the
97 00 - No change (reset state value kept)
101 DEBOUNCE (1 << 16): indicate this pin needs debounce.
102 DEBOUNCE_VAL (0x3fff << 17): debounce value.
105 Some requirements for using atmel,at91rm9200-pinctrl binding:
106 1. We have pin function node defined under at91 controller node to represent
107 what pinmux functions this SoC supports.
108 2. The driver can use the function node's name and pin configuration node's
109 name describe the pin function and group hierarchy.
110 For example, Linux at91 pinctrl driver takes the function node's name
111 as the function name and pin configuration node's name as group name to
112 create the map table.
113 3. Each pin configuration node should have a phandle, devices can set pins
114 configurations by referring to the phandle of that pin configuration node.
115 4. The gpio controller must be describe in the pinctrl simple-bus.
120 #address-cells = <1>;
123 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
124 reg = <0xfffff400 0x600>;
128 0xffffffff 0xffc00c3b /* pioA */
129 0xffffffff 0x7fff3ccf /* pioB */
130 0xffffffff 0x007fffff /* pioC */
133 /* shared pinctrl settings */
135 pinctrl_dbgu: dbgu-0 {
137 <1 14 0x1 0x0 /* PB14 periph A */
138 1 15 0x1 0x1>; /* PB15 periph A with pullup */
143 dbgu: serial@fffff200 {
144 compatible = "atmel,at91sam9260-usart";
145 reg = <0xfffff200 0x200>;
146 interrupts = <1 4 7>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_dbgu>;