1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI AM654 SERDES binding
10 This binding describes the TI AM654 SERDES. AM654 SERDES can be configured
11 to be used with either PCIe or USB or SGMII.
14 - Kishon Vijay Abraham I <kishon@ti.com>
34 Three input clocks referring to left input reference clock, refclk and right input reference
38 $ref: "/schemas/types.yaml#/definitions/phandle-array"
39 assigned-clock-parents:
40 $ref: "/schemas/types.yaml#/definitions/phandle-array"
45 The 1st cell corresponds to the phy type (should be one of the types specified in
46 include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes lane function.
49 description: Phandle to the SYSCON entry required for configuring SERDES clock selection.
50 $ref: /schemas/types.yaml#/definitions/phandle
57 description: Phandle to the SYSCON entry required for configuring SERDES lane function.
61 - description: Clock output names for SERDES 0
63 - const: serdes0_cmu_refclk
64 - const: serdes0_lo_refclk
65 - const: serdes0_ro_refclk
66 - description: Clock output names for SERDES 1
68 - const: serdes1_cmu_refclk
69 - const: serdes1_lo_refclk
70 - const: serdes1_ro_refclk
78 - assigned-clock-parents
83 additionalProperties: false
87 #include <dt-bindings/phy/phy-am654-serdes.h>
89 serdes0: serdes@900000 {
90 compatible = "ti,phy-am654-serdes";
91 reg = <0x900000 0x2000>;
94 power-domains = <&k3_pds 153>;
95 clocks = <&k3_clks 153 4>, <&k3_clks 153 1>,
96 <&serdes1 AM654_SERDES_LO_REFCLK>;
97 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
98 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
99 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
100 ti,serdes-clk = <&serdes0_clk>;
101 mux-controls = <&serdes_mux 0>;