Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: StarFive SoC JH7110 MIPI D-PHY Rx Controller
   8
   9 maintainers:
  10   - Jack Zhu <jack.zhu@starfivetech.com>
  11   - Changhuang Liang <changhuang.liang@starfivetech.com>
  12
  13 description:
  14   StarFive SoCs contain a MIPI CSI D-PHY based on M31 IP, used to
  15   transfer CSI camera data.
  16
  17 properties:
  18   compatible:
  19     const: starfive,jh7110-dphy-rx
  20
  21   reg:
  22     maxItems: 1
  23
  24   clocks:
  25     items:
  26       - description: config clock
  27       - description: reference clock
  28       - description: escape mode transmit clock
  29
  30   clock-names:
  31     items:
  32       - const: cfg
  33       - const: ref
  34       - const: tx
  35
  36   resets:
  37     items:
  38       - description: DPHY_HW reset
  39       - description: DPHY_B09_ALWAYS_ON reset
  40
  41   power-domains:
  42     maxItems: 1
  43
  44   "#phy-cells":
  45     const: 0
  46
  47 required:
  48   - compatible
  49   - reg
  50   - clocks
  51   - clock-names
  52   - resets
  53   - power-domains
  54   - "#phy-cells"
  55
  56 additionalProperties: false
  57
  58 examples:
  59   - |
  60     phy@19820000 {
  61       compatible = "starfive,jh7110-dphy-rx";
  62       reg = <0x19820000 0x10000>;
  63       clocks = <&ispcrg 3>,
  64                <&ispcrg 4>,
  65                <&ispcrg 5>;
  66       clock-names = "cfg", "ref", "tx";
  67       resets = <&ispcrg 2>,
  68                <&ispcrg 3>;
  69       power-domains = <&aon_syscon 1>;
  70       #phy-cells = <0>;
  71     };