1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB, SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
13 The QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy
23 - qcom,msm8998-qmp-usb3-phy
24 - qcom,qcm2290-qmp-usb3-phy
25 - qcom,sa8775p-qmp-usb3-uni-phy
26 - qcom,sc8280xp-qmp-usb3-uni-phy
27 - qcom,sdm845-qmp-usb3-uni-phy
28 - qcom,sdx55-qmp-usb3-uni-phy
29 - qcom,sdx65-qmp-usb3-uni-phy
30 - qcom,sdx75-qmp-usb3-uni-phy
31 - qcom,sm6115-qmp-usb3-phy
32 - qcom,sm8150-qmp-usb3-uni-phy
33 - qcom,sm8250-qmp-usb3-uni-phy
34 - qcom,sm8350-qmp-usb3-uni-phy
91 - qcom,ipq6018-qmp-usb3-phy
92 - qcom,ipq8074-qmp-usb3-phy
93 - qcom,ipq9574-qmp-usb3-phy
94 - qcom,msm8996-qmp-usb3-phy
95 - qcom,msm8998-qmp-usb3-phy
96 - qcom,sdx55-qmp-usb3-uni-phy
97 - qcom,sdx65-qmp-usb3-uni-phy
98 - qcom,sdx75-qmp-usb3-uni-phy
115 - qcom,qcm2290-qmp-usb3-phy
116 - qcom,sm6115-qmp-usb3-phy
133 - qcom,sa8775p-qmp-usb3-uni-phy
134 - qcom,sc8280xp-qmp-usb3-uni-phy
135 - qcom,sm8150-qmp-usb3-uni-phy
136 - qcom,sm8250-qmp-usb3-uni-phy
137 - qcom,sm8350-qmp-usb3-uni-phy
154 - qcom,sdm845-qmp-usb3-uni-phy
172 - qcom,sa8775p-qmp-usb3-uni-phy
173 - qcom,sc8280xp-qmp-usb3-uni-phy
178 additionalProperties: false
182 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
183 #include <dt-bindings/clock/qcom,rpmh.h>
186 compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";
187 reg = <0x088ef000 0x2000>;
189 clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
190 <&gcc GCC_USB3_MP0_CLKREF_CLK>,
191 <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
192 <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
193 clock-names = "aux", "ref", "com_aux", "pipe";
195 power-domains = <&gcc USB30_MP_GDSC>;
197 resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
198 <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
199 reset-names = "phy", "phy_phy";
201 vdda-phy-supply = <&vreg_l3a>;
202 vdda-pll-supply = <&vreg_l5a>;
205 clock-output-names = "usb2_phy0_pipe_clk";