Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SerDes/SGMII ethernet PHY controller
   8
   9 maintainers:
  10   - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
  11
  12 description:
  13   The SerDes PHY sits between the MAC and the external PHY and provides
  14   separate Rx Tx lines.
  15
  16 properties:
  17   compatible:
  18     const: qcom,sa8775p-dwmac-sgmii-phy
  19
  20   reg:
  21     items:
  22       - description: serdes
  23
  24   clocks:
  25     maxItems: 1
  26
  27   clock-names:
  28     const: sgmi_ref
  29
  30   phy-supply:
  31     description:
  32       Phandle to a regulator that provides power to the PHY.
  33
  34   "#phy-cells":
  35     const: 0
  36
  37 required:
  38   - compatible
  39   - reg
  40   - "#phy-cells"
  41   - clocks
  42   - clock-names
  43
  44 additionalProperties: false
  45
  46 examples:
  47   - |
  48     #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
  49     serdes_phy: phy@8901000 {
  50         compatible = "qcom,sa8775p-dwmac-sgmii-phy";
  51         reg = <0x08901000 0xe10>;
  52         clocks = <&gcc GCC_SGMI_CLKREF_EN>;
  53         clock-names = "sgmi_ref";
  54         #phy-cells = <0>;
  55     };