1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP PHY controller (USB)
10 - Vinod Koul <vkoul@kernel.org>
13 QMP PHY controller supports physical layer functionality for a number of
14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,msm8996-qmp-usb3-phy
22 - qcom,msm8998-qmp-usb3-phy
23 - qcom,qcm2290-qmp-usb3-phy
24 - qcom,sc7180-qmp-usb3-phy
25 - qcom,sc8180x-qmp-usb3-phy
26 - qcom,sc8280xp-qmp-usb3-uni-phy
27 - qcom,sdm845-qmp-usb3-phy
28 - qcom,sdm845-qmp-usb3-uni-phy
29 - qcom,sdx55-qmp-usb3-uni-phy
30 - qcom,sdx65-qmp-usb3-uni-phy
31 - qcom,sm8150-qmp-usb3-phy
32 - qcom,sm8150-qmp-usb3-uni-phy
33 - qcom,sm8250-qmp-usb3-phy
34 - qcom,sm8250-qmp-usb3-uni-phy
35 - qcom,sm8350-qmp-usb3-phy
36 - qcom,sm8350-qmp-usb3-uni-phy
37 - qcom,sm8450-qmp-usb3-phy
74 vddp-ref-clk-supply: true
79 description: single PHY-provider child node
87 - description: PIPE clock
110 additionalProperties: false
125 additionalProperties: false
133 - qcom,sc7180-qmp-usb3-phy
155 - qcom,sdm845-qmp-usb3-uni-phy
178 - qcom,ipq8074-qmp-usb3-phy
179 - qcom,msm8996-qmp-usb3-phy
180 - qcom,msm8998-qmp-usb3-phy
181 - qcom,sdx55-qmp-usb3-uni-phy
182 - qcom,sdx65-qmp-usb3-uni-phy
204 - qcom,sc8280xp-qmp-usb3-uni-phy
205 - qcom,sm8150-qmp-usb3-phy
206 - qcom,sm8150-qmp-usb3-uni-phy
207 - qcom,sm8250-qmp-usb3-uni-phy
208 - qcom,sm8350-qmp-usb3-uni-phy
231 - qcom,sm8250-qmp-usb3-phy
232 - qcom,sm8350-qmp-usb3-phy
254 - qcom,qcm2290-qmp-usb3-phy
276 - qcom,sc8280xp-qmp-usb3-uni-phy
286 - qcom,sdm845-qmp-usb3-phy
287 - qcom,sm8150-qmp-usb3-phy
288 - qcom,sm8350-qmp-usb3-phy
289 - qcom,sm8450-qmp-usb3-phy
296 - description: TX lane 1
297 - description: RX lane 1
299 - description: TX lane 2
300 - description: RX lane 2
301 - description: PCS_MISC
308 - qcom,msm8998-qmp-usb3-phy
315 - description: TX lane 1
316 - description: RX lane 1
318 - description: TX lane 2
319 - description: RX lane 2
326 - qcom,ipq6018-qmp-usb3-phy
327 - qcom,ipq8074-qmp-usb3-phy
328 - qcom,qcm2290-qmp-usb3-phy
329 - qcom,sc7180-qmp-usb3-phy
330 - qcom,sc8180x-qmp-usb3-phy
331 - qcom,sdx55-qmp-usb3-uni-phy
332 - qcom,sdx65-qmp-usb3-uni-phy
333 - qcom,sm8150-qmp-usb3-uni-phy
334 - qcom,sm8250-qmp-usb3-phy
344 - description: PCS_MISC
351 - qcom,msm8996-qmp-usb3-phy
352 - qcom,sc8280xp-qmp-usb3-uni-phy
353 - qcom,sm8250-qmp-usb3-uni-phy
354 - qcom,sm8350-qmp-usb3-uni-phy
367 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
368 usb_2_qmpphy: phy-wrapper@88eb000 {
369 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
370 reg = <0x088eb000 0x18c>;
371 #address-cells = <1>;
373 ranges = <0x0 0x088eb000 0x2000>;
375 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
376 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
377 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
378 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
379 clock-names = "aux", "cfg_ahb", "ref", "com_aux";
381 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
382 <&gcc GCC_USB3_PHY_SEC_BCR>;
383 reset-names = "phy", "common";
385 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
386 vdda-pll-supply = <&vdda_usb2_ss_core>;
388 usb_2_ssphy: phy@200 {
394 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
397 clock-output-names = "usb3_uni_phy_pipe_clk_src";