1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP PHY controller
11 - Vinod Koul <vkoul@kernel.org>
14 QMP phy controller supports physical layer functionality for a number of
15 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
20 - qcom,ipq6018-qmp-pcie-phy
21 - qcom,ipq6018-qmp-usb3-phy
22 - qcom,ipq8074-qmp-pcie-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-pcie-phy
25 - qcom,msm8996-qmp-ufs-phy
26 - qcom,msm8996-qmp-usb3-phy
27 - qcom,msm8998-qmp-pcie-phy
28 - qcom,msm8998-qmp-ufs-phy
29 - qcom,msm8998-qmp-usb3-phy
30 - qcom,qcm2290-qmp-usb3-phy
31 - qcom,sc7180-qmp-usb3-phy
32 - qcom,sc8180x-qmp-pcie-phy
33 - qcom,sc8180x-qmp-ufs-phy
34 - qcom,sc8180x-qmp-usb3-phy
35 - qcom,sc8280xp-qmp-ufs-phy
36 - qcom,sdm845-qhp-pcie-phy
37 - qcom,sdm845-qmp-pcie-phy
38 - qcom,sdm845-qmp-ufs-phy
39 - qcom,sdm845-qmp-usb3-phy
40 - qcom,sdm845-qmp-usb3-uni-phy
41 - qcom,sm6115-qmp-ufs-phy
42 - qcom,sm6350-qmp-ufs-phy
43 - qcom,sm8150-qmp-ufs-phy
44 - qcom,sm8150-qmp-usb3-phy
45 - qcom,sm8150-qmp-usb3-uni-phy
46 - qcom,sm8250-qmp-ufs-phy
47 - qcom,sm8250-qmp-gen3x1-pcie-phy
48 - qcom,sm8250-qmp-gen3x2-pcie-phy
49 - qcom,sm8250-qmp-modem-pcie-phy
50 - qcom,sm8250-qmp-usb3-phy
51 - qcom,sm8250-qmp-usb3-uni-phy
52 - qcom,sm8350-qmp-ufs-phy
53 - qcom,sm8350-qmp-usb3-phy
54 - qcom,sm8350-qmp-usb3-uni-phy
55 - qcom,sm8450-qmp-gen3x1-pcie-phy
56 - qcom,sm8450-qmp-gen4x2-pcie-phy
57 - qcom,sm8450-qmp-ufs-phy
58 - qcom,sm8450-qmp-usb3-phy
59 - qcom,sdx55-qmp-pcie-phy
60 - qcom,sdx55-qmp-usb3-uni-phy
61 - qcom,sdx65-qmp-usb3-uni-phy
66 - description: Address and length of PHY's common serdes block.
67 - description: Address and length of PHY's DP_COM control block.
98 Phandle to a regulator supply to PHY core block.
102 Phandle to 1.8V regulator supply to PHY refclk pll block.
106 Phandle to a regulator supply to any specific refclk pll block.
113 Each device node of QMP phy is required to have as many child nodes as
114 the number of lanes the PHY has.
128 additionalProperties: false
136 - qcom,sdm845-qmp-usb3-uni-phy
141 - description: Phy aux clock.
142 - description: Phy config clock.
143 - description: 19.2 MHz ref clk.
144 - description: Phy common block aux clock.
153 - description: reset of phy block.
154 - description: phy common block reset.
167 - qcom,sdx55-qmp-usb3-uni-phy
168 - qcom,sdx65-qmp-usb3-uni-phy
173 - description: Phy aux clock.
174 - description: Phy config clock.
175 - description: 19.2 MHz ref clk.
183 - description: reset of phy block.
184 - description: phy common block reset.
197 - qcom,msm8996-qmp-pcie-phy
202 - description: Phy aux clock.
203 - description: Phy config clock.
204 - description: 19.2 MHz ref clk.
212 - description: reset of phy block.
213 - description: phy common block reset.
214 - description: phy's ahb cfg block reset.
228 - qcom,ipq8074-qmp-usb3-phy
229 - qcom,msm8996-qmp-usb3-phy
230 - qcom,msm8998-qmp-pcie-phy
231 - qcom,msm8998-qmp-usb3-phy
236 - description: Phy aux clock.
237 - description: Phy config clock.
238 - description: 19.2 MHz ref clk.
246 - description: reset of phy block.
247 - description: phy common block reset.
260 - qcom,msm8996-qmp-ufs-phy
265 - description: 19.2 MHz ref clk.
271 - description: PHY reset in the UFS controller.
283 - qcom,msm8998-qmp-ufs-phy
284 - qcom,sdm845-qmp-ufs-phy
285 - qcom,sm6350-qmp-ufs-phy
286 - qcom,sm8150-qmp-ufs-phy
287 - qcom,sm8250-qmp-ufs-phy
288 - qcom,sc8180x-qmp-ufs-phy
289 - qcom,sc8280xp-qmp-ufs-phy
294 - description: 19.2 MHz ref clk.
295 - description: Phy reference aux clock.
302 - description: PHY reset in the UFS controller.
314 - qcom,ipq6018-qmp-pcie-phy
315 - qcom,ipq8074-qmp-pcie-phy
320 - description: Phy aux clock.
321 - description: Phy config clock.
328 - description: reset of phy block.
329 - description: phy common block reset.
339 - qcom,sc8180x-qmp-pcie-phy
340 - qcom,sdm845-qhp-pcie-phy
341 - qcom,sdm845-qmp-pcie-phy
342 - qcom,sdx55-qmp-pcie-phy
343 - qcom,sm8250-qmp-gen3x1-pcie-phy
344 - qcom,sm8250-qmp-gen3x2-pcie-phy
345 - qcom,sm8250-qmp-modem-pcie-phy
346 - qcom,sm8450-qmp-gen3x1-pcie-phy
347 - qcom,sm8450-qmp-gen4x2-pcie-phy
352 - description: Phy aux clock.
353 - description: Phy config clock.
354 - description: 19.2 MHz ref clk.
355 - description: Phy refgen clk.
364 - description: reset of phy block.
376 - qcom,sm8150-qmp-usb3-phy
377 - qcom,sm8150-qmp-usb3-uni-phy
378 - qcom,sm8250-qmp-usb3-uni-phy
379 - qcom,sm8350-qmp-usb3-uni-phy
384 - description: Phy aux clock.
385 - description: 19.2 MHz ref clk source.
386 - description: 19.2 MHz ref clk.
387 - description: Phy common block aux clock.
396 - description: reset of phy block.
397 - description: phy common block reset.
410 - qcom,sm8250-qmp-usb3-phy
411 - qcom,sm8350-qmp-usb3-phy
416 - description: Phy aux clock.
417 - description: 19.2 MHz ref clk.
418 - description: Phy common block aux clock.
426 - description: reset of phy block.
427 - description: phy common block reset.
440 - qcom,qcm2290-qmp-usb3-phy
445 - description: Phy config clock.
446 - description: 19.2 MHz ref clk.
447 - description: Phy common block aux clock.
455 - description: phy_phy reset.
456 - description: reset of phy block.
467 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
468 usb_2_qmpphy: phy-wrapper@88eb000 {
469 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
470 reg = <0x088eb000 0x18c>;
472 #address-cells = <1>;
474 ranges = <0x0 0x088eb000 0x2000>;
476 clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
477 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
478 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
479 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
480 clock-names = "aux", "cfg_ahb", "ref", "com_aux";
482 resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
483 <&gcc GCC_USB3_PHY_SEC_BCR>;
484 reset-names = "phy", "common";
486 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
487 vdda-pll-supply = <&vdda_usb2_ss_core>;
489 usb_2_ssphy: phy@200 {
496 clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
497 clock-names = "pipe0";
498 clock-output-names = "usb3_uni_phy_pipe_clk_src";