Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip USB2.0 phy with inno IP block
   8
   9 maintainers:
  10   - Heiko Stuebner <heiko@sntech.de>
  11
  12 properties:
  13   compatible:
  14     enum:
  15       - rockchip,px30-usb2phy
  16       - rockchip,rk3128-usb2phy
  17       - rockchip,rk3228-usb2phy
  18       - rockchip,rk3308-usb2phy
  19       - rockchip,rk3328-usb2phy
  20       - rockchip,rk3366-usb2phy
  21       - rockchip,rk3399-usb2phy
  22       - rockchip,rk3568-usb2phy
  23       - rockchip,rv1108-usb2phy
  24
  25   reg:
  26     maxItems: 1
  27
  28   clock-output-names:
  29     description:
  30       The usb 480m output clock name.
  31
  32   "#clock-cells":
  33     const: 0
  34
  35   clocks:
  36     maxItems: 1
  37
  38   clock-names:
  39     const: phyclk
  40
  41   assigned-clocks:
  42     description:
  43       Phandle of the usb 480m clock.
  44
  45   assigned-clock-parents:
  46     description:
  47       Parent of the usb 480m clock.
  48       Select between usb-phy output 480m and xin24m.
  49       Refer to clk/clock-bindings.txt for generic clock consumer properties.
  50
  51   extcon:
  52     description:
  53       Phandle to the extcon device providing the cable state for the otg phy.
  54
  55   interrupts:
  56     description: Muxed interrupt for both ports
  57     maxItems: 1
  58
  59   rockchip,usbgrf:
  60     $ref: /schemas/types.yaml#/definitions/phandle
  61     description:
  62       Phandle to the syscon managing the 'usb general register files'.
  63       When set the driver will request its phandle as one companion-grf
  64       for some special SoCs (e.g rv1108).
  65
  66   host-port:
  67     type: object
  68     additionalProperties: false
  69
  70     properties:
  71       "#phy-cells":
  72         const: 0
  73
  74       interrupts:
  75         description: host linestate interrupt
  76         maxItems: 1
  77
  78       interrupt-names:
  79         const: linestate
  80
  81       phy-supply:
  82         description:
  83           Phandle to a regulator that provides power to VBUS.
  84           See ./phy-bindings.txt for details.
  85
  86     required:
  87       - "#phy-cells"
  88
  89   otg-port:
  90     type: object
  91     additionalProperties: false
  92
  93     properties:
  94       "#phy-cells":
  95         const: 0
  96
  97       interrupts:
  98         minItems: 1
  99         maxItems: 3
 100
 101       interrupt-names:
 102         oneOf:
 103           - const: linestate
 104           - const: otg-mux
 105           - items:
 106               - const: otg-bvalid
 107               - const: otg-id
 108               - const: linestate
 109
 110       phy-supply:
 111         description:
 112           Phandle to a regulator that provides power to VBUS.
 113           See ./phy-bindings.txt for details.
 114
 115     required:
 116       - "#phy-cells"
 117
 118 required:
 119   - compatible
 120   - reg
 121   - clock-output-names
 122   - "#clock-cells"
 123   - host-port
 124   - otg-port
 125
 126 allOf:
 127   - if:
 128       properties:
 129         compatible:
 130           contains:
 131             const: rockchip,rk3568-usb2phy
 132
 133     then:
 134       properties:
 135         host-port:
 136           properties:
 137             interrupts: false
 138
 139         otg-port:
 140           properties:
 141             interrupts: false
 142
 143       required:
 144         - interrupts
 145
 146     else:
 147       properties:
 148         interrupts: false
 149
 150         host-port:
 151           required:
 152             - interrupts
 153             - interrupt-names
 154
 155         otg-port:
 156           required:
 157             - interrupts
 158             - interrupt-names
 159
 160 additionalProperties: false
 161
 162 examples:
 163   - |
 164     #include <dt-bindings/clock/rk3399-cru.h>
 165     #include <dt-bindings/interrupt-controller/arm-gic.h>
 166     #include <dt-bindings/interrupt-controller/irq.h>
 167     u2phy0: usb2phy@e450 {
 168       compatible = "rockchip,rk3399-usb2phy";
 169       reg = <0xe450 0x10>;
 170       clocks = <&cru SCLK_USB2PHY0_REF>;
 171       clock-names = "phyclk";
 172       clock-output-names = "clk_usbphy0_480m";
 173       #clock-cells = <0>;
 174
 175       u2phy0_host: host-port {
 176         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
 177         interrupt-names = "linestate";
 178         #phy-cells = <0>;
 179       };
 180
 181       u2phy0_otg: otg-port {
 182         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
 183                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
 184                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
 185         interrupt-names = "otg-bvalid", "otg-id", "linestate";
 186         #phy-cells = <0>;
 187       };
 188     };