1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
15 signals) which connect directly to pins/pads on the SoC package. Each lane
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
17 documentation. Each such "pad" may control either one or multiple lanes,
18 and thus contains any logic common to all its lanes. Each lane can be
19 separately configured and powered up.
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
25 ports (e.g. PCIe) and the lanes.
27 In addition to per-lane configuration, USB 3.0 ports may require additional
28 settings on a per-board basis.
30 Pads will be represented as children of the top-level XUSB pad controller
31 device tree node. Each lane exposed by the pad will be represented by its
32 own subnode and can be referenced by users of the lane using the standard
33 PHY bindings, as described by the phy-bindings.txt file in this directory.
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
37 "port" is typically used to denote the physical USB receptacle. The device
38 tree binding in this document uses the term "port" to refer to the logical
39 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
40 for the USB signal, the VBUS power supply, the USB 2.0 companion port for
41 USB 3.0 receptacles, ...).
45 const: nvidia,tegra210-xusb-padctl
52 - description: pad controller reset
56 - description: XUSB pad controller interrupt
62 avdd-pll-utmip-supply:
63 description: UTMI PLL power supply. Must supply 1.8 V.
65 avdd-pll-uerefe-supply:
66 description: PLLE reference PLL power supply. Must supply 1.05 V.
69 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
71 hvdd-pex-pll-e-supply:
72 description: High-voltage PLLE power supply. Must supply 1.8 V.
75 description: phandle to the Tegra Power Management Controller (PMC) node
76 $ref: /schemas/types.yaml#/definitions/phandle
79 description: A required child node named "pads" contains a list of
80 subnodes, one for each of the pads exposed by the XUSB pad controller.
81 Each pad may need additional resources that can be referenced in its
84 The "status" property is used to enable or disable the use of a pad.
85 If set to "disabled", the pad will not be used on the given board. In
86 order to use the pad and any of its lanes, this property must be set
87 to "okay" or be absent.
89 additionalProperties: false
93 additionalProperties: false
97 - description: USB2 tracking clock
105 additionalProperties: false
109 additionalProperties: false
115 description: Function selection for this lane.
116 $ref: /schemas/types.yaml#/definitions/string
117 enum: [ snps, xusb, uart ]
121 additionalProperties: false
127 description: Function selection for this lane.
128 $ref: /schemas/types.yaml#/definitions/string
129 enum: [ snps, xusb, uart ]
133 additionalProperties: false
139 description: Function selection for this lane.
140 $ref: /schemas/types.yaml#/definitions/string
141 enum: [ snps, xusb, uart ]
145 additionalProperties: false
151 description: Function selection for this lane.
152 $ref: /schemas/types.yaml#/definitions/string
153 enum: [ snps, xusb, uart ]
157 additionalProperties: false
161 - description: HSIC tracking clock
169 additionalProperties: false
173 additionalProperties: false
179 description: Function selection for this lane.
180 $ref: /schemas/types.yaml#/definitions/string
185 additionalProperties: false
191 description: Function selection for this lane.
192 $ref: /schemas/types.yaml#/definitions/string
197 additionalProperties: false
201 - description: PCIe PLL clock source
209 - description: PCIe PHY reset
217 additionalProperties: false
221 additionalProperties: false
227 description: Function selection for this lane.
228 $ref: /schemas/types.yaml#/definitions/string
229 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
233 additionalProperties: false
239 description: Function selection for this lane.
240 $ref: /schemas/types.yaml#/definitions/string
241 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
245 additionalProperties: false
251 description: Function selection for this lane.
252 $ref: /schemas/types.yaml#/definitions/string
253 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
257 additionalProperties: false
263 description: Function selection for this lane.
264 $ref: /schemas/types.yaml#/definitions/string
265 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
269 additionalProperties: false
275 description: Function selection for this lane.
276 $ref: /schemas/types.yaml#/definitions/string
277 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
281 additionalProperties: false
287 description: Function selection for this lane.
288 $ref: /schemas/types.yaml#/definitions/string
289 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
293 additionalProperties: false
299 description: Function selection for this lane.
300 $ref: /schemas/types.yaml#/definitions/string
301 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
305 additionalProperties: false
309 - description: SATA PLL clock source
317 - description: SATA PHY reset
325 additionalProperties: false
329 additionalProperties: false
335 description: Function selection for this lane.
336 $ref: /schemas/types.yaml#/definitions/string
337 enum: [ usb3-ss, sata ]
340 description: A required child node named "ports" contains a list of
341 subnodes, one for each of the ports exposed by the XUSB pad controller.
342 Each port may need additional resources that can be referenced in its
345 The "status" property is used to enable or disable the use of a port.
346 If set to "disabled", the port will not be used on the given board. In
347 order to use the port, this property must be set to "okay".
349 additionalProperties: false
353 additionalProperties: false
355 # no need to further describe this because the connector will
356 # match on gpio-usb-b-connector or usb-b-connector and cause
357 # that binding to be selected for the subnode
362 description: A string that determines the mode in which to
364 $ref: /schemas/types.yaml#/definitions/string
365 enum: [ host, peripheral, otg ]
368 description: A boolean property whose presence determines
369 that a port is internal. In the absence of this property
370 the port is considered to be external.
371 $ref: /schemas/types.yaml#/definitions/flag
375 A boolean property whole presence indicates that the port
376 supports OTG or peripheral mode. If present, the port
377 supports switching between USB host and peripheral roles.
378 A connector must be added as a subnode in that case.
380 See ../connector/usb-connector.yaml.
383 description: A phandle to the regulator supplying the VBUS
387 usb-role-switch: [ connector ]
391 additionalProperties: false
393 # no need to further describe this because the connector will
394 # match on gpio-usb-b-connector or usb-b-connector and cause
395 # that binding to be selected for the subnode
400 description: A string that determines the mode in which to
402 $ref: /schemas/types.yaml#/definitions/string
403 enum: [ host, peripheral, otg ]
406 description: A boolean property whose presence determines
407 that a port is internal. In the absence of this property
408 the port is considered to be external.
409 $ref: /schemas/types.yaml#/definitions/flag
413 A boolean property whole presence indicates that the port
414 supports OTG or peripheral mode. If present, the port
415 supports switching between USB host and peripheral roles.
416 A connector must be added as a subnode in that case.
418 See ../connector/usb-connector.yaml.
421 description: A phandle to the regulator supplying the VBUS
425 usb-role-switch: [ connector ]
429 additionalProperties: false
431 # no need to further describe this because the connector will
432 # match on gpio-usb-b-connector or usb-b-connector and cause
433 # that binding to be selected for the subnode
438 description: A string that determines the mode in which to
440 $ref: /schemas/types.yaml#/definitions/string
441 enum: [ host, peripheral, otg ]
444 description: A boolean property whose presence determines
445 that a port is internal. In the absence of this property
446 the port is considered to be external.
447 $ref: /schemas/types.yaml#/definitions/flag
451 A boolean property whole presence indicates that the port
452 supports OTG or peripheral mode. If present, the port
453 supports switching between USB host and peripheral roles.
454 A connector must be added as a subnode in that case.
456 See ../connector/usb-connector.yaml.
459 description: A phandle to the regulator supplying the VBUS
463 usb-role-switch: [ connector ]
467 additionalProperties: false
469 # no need to further describe this because the connector will
470 # match on gpio-usb-b-connector or usb-b-connector and cause
471 # that binding to be selected for the subnode
476 description: A string that determines the mode in which to
478 $ref: /schemas/types.yaml#/definitions/string
479 enum: [ host, peripheral, otg ]
482 description: A boolean property whose presence determines
483 that a port is internal. In the absence of this property
484 the port is considered to be external.
485 $ref: /schemas/types.yaml#/definitions/flag
489 A boolean property whole presence indicates that the port
490 supports OTG or peripheral mode. If present, the port
491 supports switching between USB host and peripheral roles.
492 A connector must be added as a subnode in that case.
494 See ../connector/usb-connector.yaml.
497 description: A phandle to the regulator supplying the VBUS
501 usb-role-switch: [ connector ]
505 additionalProperties: false
508 description: A phandle to the regulator supplying the VBUS
513 additionalProperties: false
516 description: A phandle to the regulator supplying the VBUS
521 additionalProperties: false
524 description: A boolean property whose presence determines
525 that a port is internal. In the absence of this property
526 the port is considered to be external.
527 $ref: /schemas/types.yaml#/definitions/flag
529 nvidia,usb2-companion:
530 description: A single cell that specifies the physical port
531 number to map this super-speed USB port to. The range of
532 valid port numbers varies with the SoC generation.
533 $ref: /schemas/types.yaml#/definitions/uint32
537 description: A phandle to the regulator supplying the VBUS
542 additionalProperties: false
545 description: A boolean property whose presence determines
546 that a port is internal. In the absence of this property
547 the port is considered to be external.
548 $ref: /schemas/types.yaml#/definitions/flag
550 nvidia,usb2-companion:
551 description: A single cell that specifies the physical port
552 number to map this super-speed USB port to. The range of
553 valid port numbers varies with the SoC generation.
554 $ref: /schemas/types.yaml#/definitions/uint32
558 description: A phandle to the regulator supplying the VBUS
563 additionalProperties: false
566 description: A boolean property whose presence determines
567 that a port is internal. In the absence of this property
568 the port is considered to be external.
569 $ref: /schemas/types.yaml#/definitions/flag
571 nvidia,usb2-companion:
572 description: A single cell that specifies the physical port
573 number to map this super-speed USB port to. The range of
574 valid port numbers varies with the SoC generation.
575 $ref: /schemas/types.yaml#/definitions/uint32
579 description: A phandle to the regulator supplying the VBUS
584 additionalProperties: false
587 description: A boolean property whose presence determines
588 that a port is internal. In the absence of this property
589 the port is considered to be external.
590 $ref: /schemas/types.yaml#/definitions/flag
592 nvidia,usb2-companion:
593 description: A single cell that specifies the physical port
594 number to map this super-speed USB port to. The range of
595 valid port numbers varies with the SoC generation.
596 $ref: /schemas/types.yaml#/definitions/uint32
600 description: A phandle to the regulator supplying the VBUS
603 additionalProperties: false
606 - avdd-pll-utmip-supply
607 - avdd-pll-uerefe-supply
608 - dvdd-pex-pll-supply
609 - hvdd-pex-pll-e-supply
613 #include <dt-bindings/clock/tegra210-car.h>
614 #include <dt-bindings/gpio/tegra-gpio.h>
615 #include <dt-bindings/interrupt-controller/arm-gic.h>
618 compatible = "nvidia,tegra210-xusb-padctl";
619 reg = <0x7009f000 0x1000>;
620 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
621 resets = <&tegra_car 142>;
622 reset-names = "padctl";
624 avdd-pll-utmip-supply = <&vdd_1v8>;
625 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
626 dvdd-pex-pll-supply = <&vdd_pex_1v05>;
627 hvdd-pex-pll-e-supply = <&vdd_1v8>;
631 clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
636 nvidia,function = "xusb";
641 nvidia,function = "xusb";
646 nvidia,function = "xusb";
651 nvidia,function = "xusb";
658 clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
676 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
678 resets = <&tegra_car 205>;
683 nvidia,function = "pcie-x1";
688 nvidia,function = "pcie-x4";
693 nvidia,function = "pcie-x4";
698 nvidia,function = "pcie-x4";
703 nvidia,function = "pcie-x4";
708 nvidia,function = "usb3-ss";
713 nvidia,function = "usb3-ss";
720 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
722 resets = <&tegra_car 204>;
727 nvidia,function = "sata";
740 compatible = "gpio-usb-b-connector",
744 vbus-gpios = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_LOW>;
749 vbus-supply = <&vdd_5v0_rtl>;
754 vbus-supply = <&vdd_usb_vbus>;
771 nvidia,usb2-companion = <1>;
775 nvidia,usb2-companion = <2>;