1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
15 signals) which connect directly to pins/pads on the SoC package. Each lane
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
17 documentation. Each such "pad" may control either one or multiple lanes,
18 and thus contains any logic common to all its lanes. Each lane can be
19 separately configured and powered up.
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
25 ports (e.g. PCIe) and the lanes.
27 In addition to per-lane configuration, USB 3.0 ports may require additional
28 settings on a per-board basis.
30 Pads will be represented as children of the top-level XUSB pad controller
31 device tree node. Each lane exposed by the pad will be represented by its
32 own subnode and can be referenced by users of the lane using the standard
33 PHY bindings, as described by the phy-bindings.txt file in this directory.
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
37 "port" is typically used to denote the physical USB receptacle. The device
38 tree binding in this document uses the term "port" to refer to the logical
39 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
40 for the USB signal, the VBUS power supply, the USB 2.0 companion port for
41 USB 3.0 receptacles, ...).
45 const: nvidia,tegra186-xusb-padctl
49 - description: pad controller registers
50 - description: AO registers
54 - description: XUSB pad controller interrupt
63 - description: pad controller reset
69 avdd-pll-erefeut-supply:
70 description: UPHY brick and reference clock as well as UTMI PHY
71 power supply. Must supply 1.8 V.
74 description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must
78 description: Bias rail for USB pad. Must supply 1.8 V.
81 description: HSIC PHY power supply. Must supply 1.2 V.
84 description: A required child node named "pads" contains a list of
85 subnodes, one for each of the pads exposed by the XUSB pad controller.
86 Each pad may need additional resources that can be referenced in its
89 The "status" property is used to enable or disable the use of a pad.
90 If set to "disabled", the pad will not be used on the given board. In
91 order to use the pad and any of its lanes, this property must be set
92 to "okay" or be absent.
94 additionalProperties: false
98 additionalProperties: false
102 - description: USB2 tracking clock
110 additionalProperties: false
114 additionalProperties: false
120 description: Function selection for this lane.
121 $ref: /schemas/types.yaml#/definitions/string
126 additionalProperties: false
132 description: Function selection for this lane.
133 $ref: /schemas/types.yaml#/definitions/string
138 additionalProperties: false
144 description: Function selection for this lane.
145 $ref: /schemas/types.yaml#/definitions/string
150 additionalProperties: false
154 - description: HSIC tracking clock
162 additionalProperties: false
166 additionalProperties: false
172 description: Function selection for this lane.
173 $ref: /schemas/types.yaml#/definitions/string
178 additionalProperties: false
182 additionalProperties: false
186 additionalProperties: false
192 description: Function selection for this lane.
193 $ref: /schemas/types.yaml#/definitions/string
198 additionalProperties: false
204 description: Function selection for this lane.
205 $ref: /schemas/types.yaml#/definitions/string
210 additionalProperties: false
216 description: Function selection for this lane.
217 $ref: /schemas/types.yaml#/definitions/string
221 description: A required child node named "ports" contains a list of
222 subnodes, one for each of the ports exposed by the XUSB pad controller.
223 Each port may need additional resources that can be referenced in its
226 The "status" property is used to enable or disable the use of a port.
227 If set to "disabled", the port will not be used on the given board. In
228 order to use the port, this property must be set to "okay".
230 additionalProperties: false
234 additionalProperties: false
236 # no need to further describe this because the connector will
237 # match on gpio-usb-b-connector or usb-b-connector and cause
238 # that binding to be selected for the subnode
243 description: A string that determines the mode in which to
245 $ref: /schemas/types.yaml#/definitions/string
246 enum: [ host, peripheral, otg ]
249 description: A boolean property whose presence determines
250 that a port is internal. In the absence of this property
251 the port is considered to be external.
252 $ref: /schemas/types.yaml#/definitions/flag
256 A boolean property whole presence indicates that the port
257 supports OTG or peripheral mode. If present, the port
258 supports switching between USB host and peripheral roles.
259 A connector must be added as a subnode in that case.
261 See ../connector/usb-connector.yaml.
264 description: A phandle to the regulator supplying the VBUS
268 usb-role-switch: [ connector ]
272 additionalProperties: false
274 # no need to further describe this because the connector will
275 # match on gpio-usb-b-connector or usb-b-connector and cause
276 # that binding to be selected for the subnode
281 description: A string that determines the mode in which to
283 $ref: /schemas/types.yaml#/definitions/string
284 enum: [ host, peripheral, otg ]
287 description: A boolean property whose presence determines
288 that a port is internal. In the absence of this property
289 the port is considered to be external.
290 $ref: /schemas/types.yaml#/definitions/flag
294 A boolean property whole presence indicates that the port
295 supports OTG or peripheral mode. If present, the port
296 supports switching between USB host and peripheral roles.
297 A connector must be added as a subnode in that case.
299 See ../connector/usb-connector.yaml.
302 description: A phandle to the regulator supplying the VBUS
306 usb-role-switch: [ connector ]
310 additionalProperties: false
312 # no need to further describe this because the connector will
313 # match on gpio-usb-b-connector or usb-b-connector and cause
314 # that binding to be selected for the subnode
319 description: A string that determines the mode in which to
321 $ref: /schemas/types.yaml#/definitions/string
322 enum: [ host, peripheral, otg ]
325 description: A boolean property whose presence determines
326 that a port is internal. In the absence of this property
327 the port is considered to be external.
328 $ref: /schemas/types.yaml#/definitions/flag
332 A boolean property whole presence indicates that the port
333 supports OTG or peripheral mode. If present, the port
334 supports switching between USB host and peripheral roles.
335 A connector must be added as a subnode in that case.
337 See ../connector/usb-connector.yaml.
340 description: A phandle to the regulator supplying the VBUS
344 usb-role-switch: [ connector ]
348 additionalProperties: false
352 additionalProperties: false
355 description: A boolean property whose presence determines
356 that a port is internal. In the absence of this property
357 the port is considered to be external.
358 $ref: /schemas/types.yaml#/definitions/flag
360 nvidia,usb2-companion:
361 description: A single cell that specifies the physical port
362 number to map this super-speed USB port to. The range of
363 valid port numbers varies with the SoC generation.
364 $ref: /schemas/types.yaml#/definitions/uint32
368 description: A phandle to the regulator supplying the VBUS
373 additionalProperties: false
376 description: A boolean property whose presence determines
377 that a port is internal. In the absence of this property
378 the port is considered to be external.
379 $ref: /schemas/types.yaml#/definitions/flag
381 nvidia,usb2-companion:
382 description: A single cell that specifies the physical port
383 number to map this super-speed USB port to. The range of
384 valid port numbers varies with the SoC generation.
385 $ref: /schemas/types.yaml#/definitions/uint32
389 description: A phandle to the regulator supplying the VBUS
394 additionalProperties: false
397 description: A boolean property whose presence determines
398 that a port is internal. In the absence of this property
399 the port is considered to be external.
400 $ref: /schemas/types.yaml#/definitions/flag
402 nvidia,usb2-companion:
403 description: A single cell that specifies the physical port
404 number to map this super-speed USB port to. The range of
405 valid port numbers varies with the SoC generation.
406 $ref: /schemas/types.yaml#/definitions/uint32
410 description: A phandle to the regulator supplying the VBUS
413 additionalProperties: false
420 - avdd-pll-erefeut-supply
427 #include <dt-bindings/clock/tegra186-clock.h>
428 #include <dt-bindings/gpio/tegra186-gpio.h>
429 #include <dt-bindings/interrupt-controller/arm-gic.h>
430 #include <dt-bindings/reset/tegra186-reset.h>
433 compatible = "nvidia,tegra186-xusb-padctl";
434 reg = <0x03520000 0x1000>,
436 reg-names = "padctl", "ao";
437 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
439 resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>;
440 reset-names = "padctl";
442 avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
443 avdd-usb-supply = <&vdd_3v3_sys>;
444 vclamp-usb-supply = <&vdd_1v8>;
445 vddio-hsic-supply = <&gnd>;
449 clocks = <&bpmp TEGRA186_CLK_USB2_TRK>;
454 nvidia,function = "xusb";
459 nvidia,function = "xusb";
464 nvidia,function = "xusb";
471 clocks = <&bpmp TEGRA186_CLK_HSIC_TRK>;
486 nvidia,function = "xusb";
491 nvidia,function = "xusb";
496 nvidia,function = "xusb";
506 vbus-supply = <&vdd_usb0>;
510 compatible = "gpio-usb-b-connector",
514 vbus-gpios = <&gpio TEGRA186_MAIN_GPIO(X, 7) GPIO_ACTIVE_LOW>;
515 id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
520 vbus-supply = <&vdd_usb1>;
533 nvidia,usb2-companion = <1>;