Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (c) 2020 MediaTek
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: MediaTek MIPI Display Serial Interface (DSI) PHY
   9
  10 maintainers:
  11   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  12   - Philipp Zabel <p.zabel@pengutronix.de>
  13   - Chunfeng Yun <chunfeng.yun@mediatek.com>
  14
  15 description: The MIPI DSI PHY supports up to 4-lane output.
  16
  17 properties:
  18   $nodename:
  19     pattern: "^dsi-phy@[0-9a-f]+$"
  20
  21   compatible:
  22     oneOf:
  23       - items:
  24           - enum:
  25               - mediatek,mt7623-mipi-tx
  26           - const: mediatek,mt2701-mipi-tx
  27       - items:
  28           - enum:
  29               - mediatek,mt6795-mipi-tx
  30           - const: mediatek,mt8173-mipi-tx
  31       - items:
  32           - enum:
  33               - mediatek,mt8188-mipi-tx
  34               - mediatek,mt8365-mipi-tx
  35           - const: mediatek,mt8183-mipi-tx
  36       - const: mediatek,mt2701-mipi-tx
  37       - const: mediatek,mt8173-mipi-tx
  38       - const: mediatek,mt8183-mipi-tx
  39
  40   reg:
  41     maxItems: 1
  42
  43   clocks:
  44     items:
  45       - description: PLL reference clock
  46
  47   clock-output-names:
  48     maxItems: 1
  49
  50   "#phy-cells":
  51     const: 0
  52
  53   "#clock-cells":
  54     const: 0
  55
  56   nvmem-cells:
  57     maxItems: 1
  58     description: A phandle to the calibration data provided by a nvmem device,
  59       if unspecified, default values shall be used.
  60
  61   nvmem-cell-names:
  62     items:
  63       - const: calibration-data
  64
  65   drive-strength-microamp:
  66     description: adjust driving current
  67     multipleOf: 200
  68     minimum: 2000
  69     maximum: 6000
  70     default: 4600
  71
  72 required:
  73   - compatible
  74   - reg
  75   - clocks
  76   - clock-output-names
  77   - "#phy-cells"
  78   - "#clock-cells"
  79
  80 additionalProperties: false
  81
  82 examples:
  83   - |
  84     #include <dt-bindings/clock/mt8173-clk.h>
  85     dsi-phy@10215000 {
  86         compatible = "mediatek,mt8173-mipi-tx";
  87         reg = <0x10215000 0x1000>;
  88         clocks = <&clk26m>;
  89         clock-output-names = "mipi_tx0_pll";
  90         drive-strength-microamp = <4000>;
  91         nvmem-cells = <&mipi_tx_calibration>;
  92         nvmem-cell-names = "calibration-data";
  93         #clock-cells = <0>;
  94         #phy-cells = <0>;
  95     };
  96
  97 ...