1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MXS USB Phy Device
10 - Xu Yang <xu.yang_2@nxp.com>
26 - const: fsl,imx23-usbphy
28 - const: fsl,imx6sll-usbphy
29 - const: fsl,imx6ul-usbphy
30 - const: fsl,imx23-usbphy
36 - const: fsl,imx7ulp-usbphy
55 phandle for anatop register, it is only for imx6 SoC series.
56 $ref: /schemas/types.yaml#/definitions/phandle
60 One of USB PHY's power supply. Can be used to keep a good signal
63 fsl,tx-cal-45-dn-ohms:
65 Resistance (in ohms) of switchable high-speed trimming resistor
66 connected in parallel with the 45 ohm resistor that terminates
72 fsl,tx-cal-45-dp-ohms:
74 Resistance (in ohms) of switchable high-speed trimming resistor
75 connected in parallel with the 45 ohm resistor that terminates
83 Current trimming value (as a percentage) of the 17.78 mA TX
85 $ref: /schemas/types.yaml#/definitions/uint32
107 - const: fsl,imx6ul-usbphy
108 - const: fsl,imx23-usbphy
113 additionalProperties: false
117 #include <dt-bindings/interrupt-controller/arm-gic.h>
118 #include <dt-bindings/clock/imx6qdl-clock.h>
120 usbphy1: usb-phy@20c9000 {
121 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
122 reg = <0x020c9000 0x1000>;
123 clocks = <&clks IMX6QDL_CLK_USBPHY1>;
124 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
125 fsl,anatop = <&anatop>;