1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic G12 DDR performance monitor
10 - Jiucheng Xu <jiucheng.xu@amlogic.com>
13 Amlogic G12 series SoC integrate DDR bandwidth monitor.
14 A timer is inside and can generate interrupt when timeout.
15 The bandwidth is counted in the timer ISR. Different platform
16 has different subset of event format attribute.
21 - amlogic,g12a-ddr-pmu
22 - amlogic,g12b-ddr-pmu
27 - description: DMC bandwidth register space.
28 - description: DMC PLL register space.
32 - description: The IRQ of the inside timer timeout.
39 additionalProperties: false
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 compatible = "amlogic,g12a-ddr-pmu";
50 reg = <0x0 0xff638000 0x0 0x100>,
51 <0x0 0xff638c00 0x0 0x100>;
52 interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;