Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-common.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip AXI PCIe Bridge Common Properties
   8
   9 maintainers:
  10   - Shawn Lin <shawn.lin@rock-chips.com>
  11
  12 properties:
  13   reg:
  14     maxItems: 2
  15
  16   clocks:
  17     maxItems: 4
  18
  19   clock-names:
  20     items:
  21       - const: aclk
  22       - const: aclk-perf
  23       - const: hclk
  24       - const: pm
  25
  26   num-lanes:
  27     maximum: 4
  28
  29   phys:
  30     oneOf:
  31       - maxItems: 1
  32       - maxItems: 4
  33
  34   phy-names:
  35     oneOf:
  36       - const: pcie-phy
  37       - items:
  38           - const: pcie-phy-0
  39           - const: pcie-phy-1
  40           - const: pcie-phy-2
  41           - const: pcie-phy-3
  42
  43   resets:
  44     maxItems: 7
  45
  46   reset-names:
  47     items:
  48       - const: core
  49       - const: mgmt
  50       - const: mgmt-sticky
  51       - const: pipe
  52       - const: pm
  53       - const: pclk
  54       - const: aclk
  55
  56 required:
  57   - compatible
  58   - reg
  59   - reg-names
  60   - clocks
  61   - clock-names
  62   - phys
  63   - phy-names
  64   - resets
  65   - reset-names
  66
  67 additionalProperties: true
  68
  69 ...