1 * Renesas R-Car PCIe interface
4 compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
5 "renesas,pcie-r8a7779" for the R8A7779 SoC;
6 "renesas,pcie-r8a7790" for the R8A7790 SoC;
7 "renesas,pcie-r8a7791" for the R8A7791 SoC;
8 "renesas,pcie-r8a7793" for the R8A7793 SoC;
9 "renesas,pcie-r8a7795" for the R8A7795 SoC;
10 "renesas,pcie-r8a7796" for the R8A7796 SoC;
11 "renesas,pcie-r8a77980" for the R8A77980 SoC;
12 "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
13 RZ/G1 compatible device.
14 "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
16 When compatible with the generic version, nodes must list the
17 SoC-specific version corresponding to the platform first
18 followed by the generic version.
20 - reg: base address and length of the PCIe controller registers.
21 - #address-cells: set to <3>
22 - #size-cells: set to <2>
23 - bus-range: PCI bus numbers covered
24 - device_type: set to "pci"
25 - ranges: ranges for the PCI memory and I/O regions.
26 - dma-ranges: ranges for the inbound memory regions.
27 - interrupts: two interrupt sources for MSI interrupts, followed by interrupt
28 source for hardware related interrupts (e.g. link speed change).
29 - #interrupt-cells: set to <1>
30 - interrupt-map-mask and interrupt-map: standard PCI properties
31 to define the mapping of the PCIe interface to interrupt numbers.
32 - clocks: from common clock binding: clock specifiers for the PCIe controller
34 - clock-names: from common clock binding: should be "pcie" and "pcie_bus".
37 - phys: from common PHY binding: PHY phandle and specifier (only make sense
38 for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
39 - phy-names: from common PHY binding: should be "pcie".
43 SoC-specific DT Entry:
46 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
47 reg = <0 0xfe000000 0 0x80000>;
50 bus-range = <0x00 0xff>;
52 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
53 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
54 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
55 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
56 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
57 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
58 interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
59 #interrupt-cells = <1>;
60 interrupt-map-mask = <0 0 0 0>;
61 interrupt-map = <0 0 0 0 &gic 0 116 4>;
62 clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;
63 clock-names = "pcie", "pcie_bus";