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2 NUMA binding description.
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9 Systems employing a Non Uniform Memory Access (NUMA) architecture contain
10 collections of hardware resources including processors, memory, and I/O buses,
11 that comprise what is commonly known as a NUMA node.
12 Processor accesses to memory within the local NUMA node is generally faster
13 than processor accesses to memory outside of the local NUMA node.
14 DT defines interfaces that allow the platform to convey NUMA node
15 topology information to OS.
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21 For the purpose of identification, each NUMA node is associated with a unique
22 token known as a node id. For the purpose of this binding
23 a node id is a 32-bit integer.
25 A device node is associated with a NUMA node by the presence of a
26 numa-node-id property which contains the node id of the device.
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39 The optional device tree node distance-map describes the relative
40 distance (memory latency) between all numa nodes.
42 - compatible : Should at least contain "numa-distance-map-v1".
45 This property defines a matrix to describe the relative distances
46 between all numa nodes.
47 It is represented as a list of node pairs and their relative distance.
50 1. Each entry represents distance from first node to second node.
51 The distances are equal in either direction.
52 2. The distance from a node to self (local distance) is represented
53 with value 10 and all internode distance should be represented with
54 a value greater than 10.
55 3. distance-matrix should have entries in lexicographical ascending
57 4. There must be only one device node distance-map which must
58 reside in the root node.
59 5. If the distance-map node is not present, a default
60 distance-matrix is used.
63 4 nodes connected in mesh/ring topology as below,
74 if relative distance for each hop is 20,
75 then internode distance would be,
83 and dt presentation for this distance matrix is,
86 compatible = "numa-distance-map-v1";
87 distance-matrix = <0 0 10>,
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109 Dual socket system consists of 2 boards connected through ccn bus and
110 each board having one socket/soc of 8 cpus, memory and pci bus.
113 device_type = "memory";
114 reg = <0x0 0xc00000 0x0 0x80000000>;
120 device_type = "memory";
121 reg = <0x100 0x0 0x0 0x80000000>;
127 #address-cells = <2>;
132 compatible = "arm,armv8";
134 enable-method = "psci";
140 compatible = "arm,armv8";
142 enable-method = "psci";
147 compatible = "arm,armv8";
149 enable-method = "psci";
154 compatible = "arm,armv8";
156 enable-method = "psci";
161 compatible = "arm,armv8";
163 enable-method = "psci";
168 compatible = "arm,armv8";
170 enable-method = "psci";
175 compatible = "arm,armv8";
177 enable-method = "psci";
182 compatible = "arm,armv8";
184 enable-method = "psci";
189 compatible = "arm,armv8";
191 enable-method = "psci";
197 compatible = "arm,armv8";
199 enable-method = "psci";
204 compatible = "arm,armv8";
206 enable-method = "psci";
211 compatible = "arm,armv8";
213 enable-method = "psci";
218 compatible = "arm,armv8";
220 enable-method = "psci";
225 compatible = "arm,armv8";
227 enable-method = "psci";
232 compatible = "arm,armv8";
234 enable-method = "psci";
239 compatible = "arm,armv8";
241 enable-method = "psci";
246 pcie0: pcie0@848000000000 {
247 compatible = "arm,armv8";
251 #address-cells = <3>;
252 reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */
253 ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
258 pcie1: pcie1@948000000000 {
259 compatible = "arm,armv8";
263 #address-cells = <3>;
264 reg = <0x9480 0x00000000 0 0x10000000>; /* Configuration space */
265 ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
271 compatible = "numa-distance-map-v1";
272 distance-matrix = <0 0 10>,