Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Technologies ath10k wireless devices
   8
   9 maintainers:
  10   - Kalle Valo <kvalo@kernel.org>
  11
  12 description:
  13   Qualcomm Technologies, Inc. IEEE 802.11ac devices.
  14
  15 properties:
  16   compatible:
  17     enum:
  18       - qcom,ath10k # SDIO-based devices
  19       - qcom,ipq4019-wifi
  20       - qcom,wcn3990-wifi # SNoC-based devices
  21
  22   reg:
  23     maxItems: 1
  24
  25   reg-names:
  26     items:
  27       - const: membase
  28
  29   interrupts:
  30     minItems: 12
  31     maxItems: 17
  32
  33   interrupt-names:
  34     minItems: 12
  35     maxItems: 17
  36
  37   memory-region:
  38     maxItems: 1
  39     description:
  40       Reference to the MSA memory region used by the Wi-Fi firmware
  41       running on the Q6 core.
  42
  43   iommus:
  44     minItems: 1
  45     maxItems: 2
  46
  47   clocks:
  48     minItems: 1
  49     maxItems: 3
  50
  51   clock-names:
  52     minItems: 1
  53     maxItems: 3
  54
  55   resets:
  56     maxItems: 6
  57
  58   reset-names:
  59     items:
  60       - const: wifi_cpu_init
  61       - const: wifi_radio_srif
  62       - const: wifi_radio_warm
  63       - const: wifi_radio_cold
  64       - const: wifi_core_warm
  65       - const: wifi_core_cold
  66
  67   ext-fem-name:
  68     $ref: /schemas/types.yaml#/definitions/string
  69     description: Name of external front end module used.
  70     enum:
  71       - microsemi-lx5586
  72       - sky85703-11
  73       - sky85803
  74
  75   wifi-firmware:
  76     type: object
  77     additionalProperties: false
  78     description: |
  79       The ath10k Wi-Fi node can contain one optional firmware subnode.
  80       Firmware subnode is needed when the platform does not have Trustzone.
  81     properties:
  82       iommus:
  83         maxItems: 1
  84     required:
  85       - iommus
  86
  87   ieee80211-freq-limit: true
  88
  89   qcom,ath10k-calibration-data:
  90     $ref: /schemas/types.yaml#/definitions/uint8-array
  91     description:
  92       Calibration data + board-specific data as a byte array. The length
  93       can vary between hardware versions.
  94
  95   qcom,ath10k-calibration-variant:
  96     $ref: /schemas/types.yaml#/definitions/string
  97     description:
  98       Unique variant identifier of the calibration data in /*(DEBLOBBED)*/
  99       for designs with colliding bus and device specific ids
 100
 101   qcom,ath10k-pre-calibration-data:
 102     $ref: /schemas/types.yaml#/definitions/uint8-array
 103     description:
 104       Pre-calibration data as a byte array. The length can vary between
 105       hardware versions.
 106
 107   qcom,coexist-support:
 108     $ref: /schemas/types.yaml#/definitions/uint8
 109     enum: [0, 1]
 110     description:
 111       Indicate coex support by the hardware.
 112
 113   qcom,coexist-gpio-pin:
 114     $ref: /schemas/types.yaml#/definitions/uint32
 115     description:
 116       COEX GPIO number provided to the Wi-Fi firmware.
 117
 118   qcom,msa-fixed-perm:
 119     type: boolean
 120     description:
 121       Whether to skip executing an SCM call that reassigns the memory
 122       region ownership.
 123
 124   qcom,smem-states:
 125     $ref: /schemas/types.yaml#/definitions/phandle-array
 126     description: State bits used by the AP to signal the WLAN Q6.
 127     items:
 128       - description: Signal bits used to enable/disable low power mode
 129                      on WCN in the case of WoW (Wake on Wireless).
 130
 131   qcom,smem-state-names:
 132     description: The names of the state bits used for SMP2P output.
 133     items:
 134       - const: wlan-smp2p-out
 135
 136   qcom,snoc-host-cap-8bit-quirk:
 137     type: boolean
 138     description:
 139       Quirk specifying that the firmware expects the 8bit version
 140       of the host capability QMI request
 141
 142   qcom,xo-cal-data:
 143     $ref: /schemas/types.yaml#/definitions/uint32
 144     description:
 145       XO cal offset to be configured in XO trim register.
 146
 147   vdd-0.8-cx-mx-supply:
 148     description: Main logic power rail
 149
 150   vdd-1.8-xo-supply:
 151     description: Crystal oscillator supply
 152
 153   vdd-1.3-rfa-supply:
 154     description: RFA supply
 155
 156   vdd-3.3-ch0-supply:
 157     description: Primary Wi-Fi antenna supply
 158
 159   vdd-3.3-ch1-supply:
 160     description: Secondary Wi-Fi antenna supply
 161
 162 required:
 163   - compatible
 164   - reg
 165
 166 additionalProperties: false
 167
 168 allOf:
 169   - $ref: ieee80211.yaml#
 170   - if:
 171       properties:
 172         compatible:
 173           contains:
 174             enum:
 175               - qcom,ipq4019-wifi
 176     then:
 177       properties:
 178         interrupts:
 179           minItems: 17
 180           maxItems: 17
 181
 182         interrupt-names:
 183           items:
 184             - const: msi0
 185             - const: msi1
 186             - const: msi2
 187             - const: msi3
 188             - const: msi4
 189             - const: msi5
 190             - const: msi6
 191             - const: msi7
 192             - const: msi8
 193             - const: msi9
 194             - const: msi10
 195             - const: msi11
 196             - const: msi12
 197             - const: msi13
 198             - const: msi14
 199             - const: msi15
 200             - const: legacy
 201
 202         clocks:
 203           items:
 204             - description: Wi-Fi command clock
 205             - description: Wi-Fi reference clock
 206             - description: Wi-Fi RTC clock
 207
 208         clock-names:
 209           items:
 210             - const: wifi_wcss_cmd
 211             - const: wifi_wcss_ref
 212             - const: wifi_wcss_rtc
 213
 214       required:
 215         - clocks
 216         - clock-names
 217         - interrupts
 218         - interrupt-names
 219         - resets
 220         - reset-names
 221
 222   - if:
 223       properties:
 224         compatible:
 225           contains:
 226             enum:
 227               - qcom,wcn3990-wifi
 228
 229     then:
 230       properties:
 231         clocks:
 232           minItems: 1
 233           items:
 234             - description: XO reference clock
 235             - description: Qualcomm Debug Subsystem clock
 236
 237         clock-names:
 238           minItems: 1
 239           items:
 240             - const: cxo_ref_clk_pin
 241             - const: qdss
 242
 243         interrupts:
 244           items:
 245             - description: CE0
 246             - description: CE1
 247             - description: CE2
 248             - description: CE3
 249             - description: CE4
 250             - description: CE5
 251             - description: CE6
 252             - description: CE7
 253             - description: CE8
 254             - description: CE9
 255             - description: CE10
 256             - description: CE11
 257
 258         interrupt-names: false
 259
 260       required:
 261         - interrupts
 262
 263 examples:
 264   # SNoC
 265   - |
 266     #include <dt-bindings/clock/qcom,rpmcc.h>
 267     #include <dt-bindings/interrupt-controller/arm-gic.h>
 268
 269     wifi@18800000 {
 270       compatible = "qcom,wcn3990-wifi";
 271       reg = <0x18800000 0x800000>;
 272       reg-names = "membase";
 273       memory-region = <&wlan_msa_mem>;
 274       clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
 275       clock-names = "cxo_ref_clk_pin";
 276       interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
 277                    <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
 278                    <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
 279                    <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 280                    <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 281                    <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 282                    <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 283                    <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 284                    <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 285                    <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 286                    <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 287                    <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
 288       iommus = <&anoc2_smmu 0x1900>,
 289                <&anoc2_smmu 0x1901>;
 290       qcom,snoc-host-cap-8bit-quirk;
 291       vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
 292       vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
 293       vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
 294       vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
 295       vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
 296
 297       wifi-firmware {
 298         iommus = <&apps_smmu 0x1c02 0x1>;
 299       };
 300     };
 301
 302   # AHB
 303   - |
 304     #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
 305
 306     wifi@a000000 {
 307         compatible = "qcom,ipq4019-wifi";
 308         reg = <0xa000000 0x200000>;
 309         resets = <&gcc WIFI0_CPU_INIT_RESET>,
 310                  <&gcc WIFI0_RADIO_SRIF_RESET>,
 311                  <&gcc WIFI0_RADIO_WARM_RESET>,
 312                  <&gcc WIFI0_RADIO_COLD_RESET>,
 313                  <&gcc WIFI0_CORE_WARM_RESET>,
 314                  <&gcc WIFI0_CORE_COLD_RESET>;
 315         reset-names = "wifi_cpu_init",
 316                       "wifi_radio_srif",
 317                       "wifi_radio_warm",
 318                       "wifi_radio_cold",
 319                       "wifi_core_warm",
 320                       "wifi_core_cold";
 321         clocks = <&gcc GCC_WCSS2G_CLK>,
 322                  <&gcc GCC_WCSS2G_REF_CLK>,
 323                  <&gcc GCC_WCSS2G_RTC_CLK>;
 324         clock-names = "wifi_wcss_cmd",
 325                       "wifi_wcss_ref",
 326                       "wifi_wcss_rtc";
 327         interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
 328                      <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
 329                      <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
 330                      <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
 331                      <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
 332                      <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
 333                      <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
 334                      <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
 335                      <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
 336                      <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
 337                      <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
 338                      <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
 339                      <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
 340                      <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
 341                      <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
 342                      <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
 343                      <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 344         interrupt-names =  "msi0",
 345                            "msi1",
 346                            "msi2",
 347                            "msi3",
 348                            "msi4",
 349                            "msi5",
 350                            "msi6",
 351                            "msi7",
 352                            "msi8",
 353                            "msi9",
 354                            "msi10",
 355                            "msi11",
 356                            "msi12",
 357                            "msi13",
 358                            "msi14",
 359                            "msi15",
 360                            "legacy";
 361         ieee80211-freq-limit = <5470000 5875000>;
 362       };