1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
6 $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 title: MediaTek mt76 wireless devices Generic Binding
12 - Felix Fietkau <nbd@nbd.name>
13 - Lorenzo Bianconi <lorenzo@kernel.org>
14 - Ryder Lee <ryder.lee@mediatek.com>
17 This node provides properties for configuring the MediaTek mt76xx
18 wireless device. The node is expected to be specified as a child
19 node of the PCI controller to which the wireless chip is connected.
20 Alternatively, it can specify the wireless part of the MT7628/MT7688
24 - $ref: ieee80211.yaml#
30 - mediatek,mt7628-wmac
31 - mediatek,mt7622-wmac
32 - mediatek,mt7986-wmac
38 MT7986 should contain 3 regions consys, dcm, and sku, in this order.
52 Specify the consys reset for mt7986.
60 Specify the consys clocks for mt7986.
68 $ref: /schemas/types.yaml#/definitions/phandle
70 Phandle to the infrastructure bus fabric syscon node.
71 This property is MT7622 specific
73 ieee80211-freq-limit: true
76 $ref: /schemas/types.yaml#/definitions/uint32-array
78 EEPROM data embedded as array.
81 $ref: /schemas/types.yaml#/definitions/phandle-array
84 - description: phandle to MTD partition
85 - description: offset containing EEPROM data
87 Phandle to a MTD partition + offset containing EEPROM data
90 $ref: /schemas/types.yaml#/definitions/flag
92 Specify if the radio eeprom partition is written in big-endian
94 mediatek,eeprom-merge-otp:
97 Merge EEPROM data with OTP data. Can be used on boards where the flash
98 calibration data is generic and specific calibration data should be
99 pulled from the OTP ROM
101 mediatek,disable-radar-background:
104 Disable/enable radar/CAC detection running on a dedicated offchannel
105 chain available on some hw.
106 Background radar/CAC detection allows to avoid the CAC downtime
107 switching on a different channel during CAC detection on the selected
112 $ref: /schemas/leds/common.yaml#
113 additionalProperties: false
120 additionalProperties: false
124 additionalProperties: false
127 $ref: /schemas/types.yaml#/definitions/string
129 Regdomain refers to a legal regulatory region. Different
130 countries define different levels of allowable transmitter
131 power, time that a channel can be occupied, and different
141 additionalProperties: false
145 additionalProperties: false
148 $ref: /schemas/types.yaml#/definitions/uint32-array
152 Pairs of first and last channel number of the selected
156 $ref: /schemas/types.yaml#/definitions/uint8-array
160 4 half-dBm per-rate power limit values
163 $ref: /schemas/types.yaml#/definitions/uint8-array
167 8 half-dBm per-rate power limit values
170 $ref: /schemas/types.yaml#/definitions/uint8-matrix
172 Sets of per-rate power limit values for 802.11n/802.11ac
173 rates for multiple channel bandwidth settings.
174 Each set starts with the number of channel bandwidth
175 settings for which the rate set applies, followed by
176 either 8 or 10 power limit values. The order of the
177 channel bandwidth settings is 20, 40, 80 and 160 MHz.
184 $ref: /schemas/types.yaml#/definitions/uint8-matrix
186 Sets of per-rate power limit values for 802.11ax rates
187 for multiple channel bandwidth or resource unit settings.
188 Each set starts with the number of channel bandwidth or
189 resource unit settings for which the rate set applies,
190 followed by 12 power limit values. The order of the
191 channel resource unit settings is RU26, RU52, RU106,
192 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
198 $ref: /schemas/types.yaml#/definitions/uint32-array
200 Half-dBm power delta for different numbers of antennas
206 unevaluatedProperties: false
211 #address-cells = <3>;
214 compatible = "mediatek,mt76";
215 reg = <0x0000 0 0 0 0>;
216 ieee80211-freq-limit = <5000000 6000000>;
217 mediatek,mtd-eeprom = <&factory 0x8000>;
230 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
231 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
232 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
233 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
234 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
237 channels = <100 181>;
238 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
239 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>;
240 txs-delta = <12 9 6>;
241 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>;
251 compatible = "mediatek,mt7628-wmac";
252 reg = <0x10300000 0x100000>;
254 interrupt-parent = <&cpuintc>;
257 mediatek,mtd-eeprom = <&factory 0x0>;
261 #include <dt-bindings/interrupt-controller/arm-gic.h>
262 #include <dt-bindings/interrupt-controller/irq.h>
264 compatible = "mediatek,mt7622-wmac";
265 reg = <0x10300000 0x100000>;
266 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
268 mediatek,infracfg = <&infracfg>;
270 power-domains = <&scpsys 3>;
275 compatible = "mediatek,mt7986-wmac";
276 resets = <&watchdog 23>;
277 reset-names = "consys";
278 reg = <0x18000000 0x1000000>,
281 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
282 clocks = <&topckgen 50>,
284 clock-names = "mcu", "ap2conn";
285 memory-region = <&wmcpu_emi>;