1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
5 $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek mt76 wireless devices
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
16 This node provides properties for configuring the MediaTek mt76xx
17 wireless device. The node is expected to be specified as a child
18 node of the PCI controller to which the wireless chip is connected.
19 Alternatively, it can specify the wireless part of the MT7628/MT7688
23 - $ref: ieee80211.yaml#
29 - mediatek,mt7628-wmac
30 - mediatek,mt7622-wmac
31 - mediatek,mt7981-wmac
32 - mediatek,mt7986-wmac
38 MT7986 should contain 3 regions consys, dcm, and sku, in this order.
52 Specify the consys reset for mt7986.
60 Specify the consys clocks for mt7986.
68 $ref: /schemas/types.yaml#/definitions/phandle
70 Phandle to the infrastructure bus fabric syscon node.
71 This property is MT7622 specific
73 ieee80211-freq-limit: true
77 - description: NVMEM cell with EEPROM
84 $ref: /schemas/types.yaml#/definitions/uint32-array
86 EEPROM data embedded as array.
89 $ref: /schemas/types.yaml#/definitions/phandle-array
92 - description: phandle to MTD partition
93 - description: offset containing EEPROM data
95 Phandle to a MTD partition + offset containing EEPROM data
99 $ref: /schemas/types.yaml#/definitions/flag
101 Specify if the radio eeprom partition is written in big-endian
103 mediatek,eeprom-merge-otp:
106 Merge EEPROM data with OTP data. Can be used on boards where the flash
107 calibration data is generic and specific calibration data should be
108 pulled from the OTP ROM
110 mediatek,disable-radar-background:
113 Disable/enable radar/CAC detection running on a dedicated offchannel
114 chain available on some hw.
115 Background radar/CAC detection allows to avoid the CAC downtime
116 switching on a different channel during CAC detection on the selected
121 $ref: /schemas/leds/common.yaml#
122 additionalProperties: false
126 LED is enabled with ground signal.
134 additionalProperties: false
138 additionalProperties: false
141 $ref: /schemas/types.yaml#/definitions/string
143 Regdomain refers to a legal regulatory region. Different
144 countries define different levels of allowable transmitter
145 power, time that a channel can be occupied, and different
155 additionalProperties: false
159 additionalProperties: false
162 $ref: /schemas/types.yaml#/definitions/uint32-array
166 Pairs of first and last channel number of the selected
170 $ref: /schemas/types.yaml#/definitions/uint8-array
174 4 half-dBm per-rate power limit values
177 $ref: /schemas/types.yaml#/definitions/uint8-array
181 8 half-dBm per-rate power limit values
184 $ref: /schemas/types.yaml#/definitions/uint8-matrix
186 Sets of per-rate power limit values for 802.11n/802.11ac
187 rates for multiple channel bandwidth settings.
188 Each set starts with the number of channel bandwidth
189 settings for which the rate set applies, followed by
190 either 8 or 10 power limit values. The order of the
191 channel bandwidth settings is 20, 40, 80 and 160 MHz.
198 $ref: /schemas/types.yaml#/definitions/uint8-matrix
200 Sets of per-rate power limit values for 802.11ax rates
201 for multiple channel bandwidth or resource unit settings.
202 Each set starts with the number of channel bandwidth or
203 resource unit settings for which the rate set applies,
204 followed by 12 power limit values. The order of the
205 channel resource unit settings is RU26, RU52, RU106,
206 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
212 $ref: /schemas/types.yaml#/definitions/uint32-array
214 Half-dBm power delta for different numbers of antennas
220 unevaluatedProperties: false
225 #address-cells = <3>;
228 compatible = "mediatek,mt76";
229 reg = <0x0000 0 0 0 0>;
230 ieee80211-freq-limit = <5000000 6000000>;
231 mediatek,mtd-eeprom = <&factory 0x8000>;
244 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
245 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
246 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
247 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
248 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
251 channels = <100 181>;
252 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
253 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>;
254 txs-delta = <12 9 6>;
255 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>;
265 compatible = "mediatek,mt7628-wmac";
266 reg = <0x10300000 0x100000>;
268 interrupt-parent = <&cpuintc>;
271 nvmem-cells = <&eeprom>;
272 nvmem-cell-names = "eeprom";
276 #include <dt-bindings/interrupt-controller/arm-gic.h>
277 #include <dt-bindings/interrupt-controller/irq.h>
279 compatible = "mediatek,mt7622-wmac";
280 reg = <0x10300000 0x100000>;
281 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
283 mediatek,infracfg = <&infracfg>;
285 power-domains = <&scpsys 3>;
290 compatible = "mediatek,mt7986-wmac";
291 resets = <&watchdog 23>;
292 reset-names = "consys";
293 reg = <0x18000000 0x1000000>,
296 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&topckgen 50>,
299 clock-names = "mcu", "ap2conn";
300 memory-region = <&wmcpu_emi>;