Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Texas Instruments ICSSG PRUSS Ethernet
   8
   9 maintainers:
  10   - Md Danish Anwar <danishanwar@ti.com>
  11
  12 description:
  13   Ethernet based on the Programmable Real-Time Unit and Industrial
  14   Communication Subsystem.
  15
  16 allOf:
  17   - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
  18
  19 properties:
  20   compatible:
  21     enum:
  22       - ti,am642-icssg-prueth  # for AM64x SoC family
  23       - ti,am654-icssg-prueth  # for AM65x SoC family
  24
  25   sram:
  26     $ref: /schemas/types.yaml#/definitions/phandle
  27     description:
  28       phandle to MSMC SRAM node
  29
  30   dmas:
  31     maxItems: 10
  32
  33   dma-names:
  34     items:
  35       - const: tx0-0
  36       - const: tx0-1
  37       - const: tx0-2
  38       - const: tx0-3
  39       - const: tx1-0
  40       - const: tx1-1
  41       - const: tx1-2
  42       - const: tx1-3
  43       - const: rx0
  44       - const: rx1
  45
  46   ti,mii-g-rt:
  47     $ref: /schemas/types.yaml#/definitions/phandle
  48     description:
  49       phandle to MII_G_RT module's syscon regmap.
  50
  51   ti,mii-rt:
  52     $ref: /schemas/types.yaml#/definitions/phandle
  53     description:
  54       phandle to MII_RT module's syscon regmap
  55
  56   ti,iep:
  57     $ref: /schemas/types.yaml#/definitions/phandle-array
  58     maxItems: 2
  59     items:
  60       maxItems: 1
  61     description:
  62       phandle to IEP (Industrial Ethernet Peripheral) for ICSSG
  63
  64   interrupts:
  65     maxItems: 2
  66     description:
  67       Interrupt specifiers to TX timestamp IRQ.
  68
  69   interrupt-names:
  70     items:
  71       - const: tx_ts0
  72       - const: tx_ts1
  73
  74   ethernet-ports:
  75     type: object
  76     additionalProperties: false
  77
  78     properties:
  79       '#address-cells':
  80         const: 1
  81       '#size-cells':
  82         const: 0
  83
  84     patternProperties:
  85       ^port@[0-1]$:
  86         type: object
  87         description: ICSSG PRUETH external ports
  88         $ref: ethernet-controller.yaml#
  89         unevaluatedProperties: false
  90
  91         properties:
  92           reg:
  93             items:
  94               - enum: [0, 1]
  95             description: ICSSG PRUETH port number
  96
  97           interrupts:
  98             maxItems: 1
  99
 100           ti,syscon-rgmii-delay:
 101             items:
 102               - items:
 103                   - description: phandle to system controller node
 104                   - description: The offset to ICSSG control register
 105             $ref: /schemas/types.yaml#/definitions/phandle-array
 106             description:
 107               phandle to system controller node and register offset
 108               to ICSSG control register for RGMII transmit delay
 109
 110           ti,half-duplex-capable:
 111             type: boolean
 112             description:
 113               Indicates that the PHY output pin COL is routed to ICSSG GPIO pin
 114               (PRGx_PRU0/1_GPIO10) as input so that the ICSSG MII port is
 115               capable of half duplex operations.
 116
 117         required:
 118           - reg
 119     anyOf:
 120       - required:
 121           - port@0
 122       - required:
 123           - port@1
 124
 125 required:
 126   - compatible
 127   - sram
 128   - dmas
 129   - dma-names
 130   - ethernet-ports
 131   - ti,mii-g-rt
 132   - interrupts
 133   - interrupt-names
 134
 135 unevaluatedProperties: false
 136
 137 examples:
 138   - |
 139     /* Example k3-am654 base board SR2.0, dual-emac */
 140     pruss2_eth: ethernet {
 141         compatible = "ti,am654-icssg-prueth";
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&icssg2_rgmii_pins_default>;
 144         sram = <&msmc_ram>;
 145
 146         ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
 147                   <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
 148         firmware-name = "/*(DEBLOBBED)*/",
 149                         "/*(DEBLOBBED)*/",
 150                         "/*(DEBLOBBED)*/",
 151                         "/*(DEBLOBBED)*/",
 152                         "/*(DEBLOBBED)*/",
 153                         "/*(DEBLOBBED)*/";
 154         ti,pruss-gp-mux-sel = <2>,      /* MII mode */
 155                               <2>,
 156                               <2>,
 157                               <2>,      /* MII mode */
 158                               <2>,
 159                               <2>;
 160         dmas = <&main_udmap 0xc300>, /* egress slice 0 */
 161                <&main_udmap 0xc301>, /* egress slice 0 */
 162                <&main_udmap 0xc302>, /* egress slice 0 */
 163                <&main_udmap 0xc303>, /* egress slice 0 */
 164                <&main_udmap 0xc304>, /* egress slice 1 */
 165                <&main_udmap 0xc305>, /* egress slice 1 */
 166                <&main_udmap 0xc306>, /* egress slice 1 */
 167                <&main_udmap 0xc307>, /* egress slice 1 */
 168                <&main_udmap 0x4300>, /* ingress slice 0 */
 169                <&main_udmap 0x4301>; /* ingress slice 1 */
 170         dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
 171                     "tx1-0", "tx1-1", "tx1-2", "tx1-3",
 172                     "rx0", "rx1";
 173         ti,mii-g-rt = <&icssg2_mii_g_rt>;
 174         ti,iep = <&icssg2_iep0>, <&icssg2_iep1>;
 175         interrupt-parent = <&icssg2_intc>;
 176         interrupts = <24 0 2>, <25 1 3>;
 177         interrupt-names = "tx_ts0", "tx_ts1";
 178         ethernet-ports {
 179             #address-cells = <1>;
 180             #size-cells = <0>;
 181             pruss2_emac0: port@0 {
 182                 reg = <0>;
 183                 phy-handle = <&pruss2_eth0_phy>;
 184                 phy-mode = "rgmii-id";
 185                 interrupts-extended = <&icssg2_intc 24>;
 186                 ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
 187                 /* Filled in by bootloader */
 188                 local-mac-address = [00 00 00 00 00 00];
 189             };
 190
 191             pruss2_emac1: port@1 {
 192                 reg = <1>;
 193                 phy-handle = <&pruss2_eth1_phy>;
 194                 phy-mode = "rgmii-id";
 195                 interrupts-extended = <&icssg2_intc 25>;
 196                 ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
 197                 /* Filled in by bootloader */
 198                 local-mac-address = [00 00 00 00 00 00];
 199             };
 200         };
 201     };