1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 BayLibre, SAS
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
15 This file documents platform glue layer for stmmac.
17 # We need a select here so we don't match all nodes with 'snps,dwmac'
29 - $ref: "snps,dwmac.yaml#"
37 - const: snps,dwmac-4.20a
41 - const: snps,dwmac-4.10a
45 - const: snps,dwmac-3.50a
50 - description: GMAC main clock
51 - description: MAC TX clock
52 - description: MAC RX clock
53 - description: For MPU family, used for power mode
54 - description: For MPU family, used for PHY without quartz
55 - description: PTP clock
70 $ref: "/schemas/types.yaml#/definitions/phandle-array"
72 Should be phandle/offset pair. The phandle to the syscon node which
73 encompases the glue register, and the offset of the control register
77 set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
82 set this property in RMII mode when you have PHY without crystal 50MHz and want to
83 select RCC clock instead of ETH_REF_CLK.
92 unevaluatedProperties: false
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #include <dt-bindings/clock/stm32mp1-clks.h>
98 #include <dt-bindings/reset/stm32mp1-resets.h>
99 #include <dt-bindings/mfd/stm32h7-rcc.h>
101 ethernet0: ethernet@5800a000 {
102 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
103 reg = <0x5800a000 0x2000>;
104 reg-names = "stmmaceth";
105 interrupts = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
106 interrupt-names = "macirq";
107 clock-names = "stmmaceth",
112 clocks = <&rcc ETHMAC>,
117 st,syscon = <&syscfg 0x4>;
119 snps,axi-config = <&stmmac_axi_config_0>;
124 //Example 2 (MCU example)
125 ethernet1: ethernet@40028000 {
126 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
127 reg = <0x40028000 0x8000>;
128 reg-names = "stmmaceth";
129 interrupts = <0 61 0>, <0 62 0>;
130 interrupt-names = "macirq", "eth_wake_irq";
131 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
132 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
133 st,syscon = <&syscfg 0x4>;
140 ethernet2: ethernet@40027000 {
141 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
142 reg = <0x40028000 0x8000>;
143 reg-names = "stmmaceth";
145 interrupt-names = "macirq";
146 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
147 clocks = <&rcc 62>, <&rcc 61>, <&rcc 60>;
148 st,syscon = <&syscfg 0x4>;