1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare MAC
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
14 # Select every compatible, including the deprecated ones. This way, we
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
17 # as a valid value in the compatible property description
45 # We need to include all the compatibles from schemas that will
46 # include that schemas, otherwise compatible won't validate for
51 - allwinner,sun7i-a20-gmac
52 - allwinner,sun8i-a83t-emac
53 - allwinner,sun8i-h3-emac
54 - allwinner,sun8i-r40-gmac
55 - allwinner,sun8i-v3s-emac
56 - allwinner,sun50i-a64-emac
57 - amlogic,meson6-dwmac
58 - amlogic,meson8b-dwmac
59 - amlogic,meson8m2-dwmac
60 - amlogic,meson-gxbb-dwmac
61 - amlogic,meson-axg-dwmac
71 - qcom,sc8280xp-ethqos
73 - renesas,r9a06g032-gmac
76 - rockchip,rk3128-gmac
77 - rockchip,rk3228-gmac
78 - rockchip,rk3288-gmac
79 - rockchip,rk3328-gmac
80 - rockchip,rk3366-gmac
81 - rockchip,rk3368-gmac
82 - rockchip,rk3588-gmac
83 - rockchip,rk3399-gmac
84 - rockchip,rv1108-gmac
98 - starfive,jh7110-dwmac
107 - description: Combined signal for various interrupt events
108 - description: The interrupt to manage the remote wake-up packet detection
109 - description: The interrupt that occurs when Rx exits the LPI state
115 - enum: [eth_wake_irq, eth_lpi]
121 additionalItems: true
123 - description: GMAC main clock
124 - description: Peripheral registers interface clock
126 PTP reference clock. This clock is used for programming the
127 Timestamp Addend Register. If not passed then the system
128 clock will be used and this is fine on some platforms.
133 additionalItems: true
143 - description: GMAC stmmaceth reset
144 - description: AHB reset
156 $ref: ethernet-controller.yaml#/properties/phy-connection-type
158 The property is identical to 'phy-mode', and assumes that there is mode
159 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
160 can be passive (no SW requirement), and requires that the MAC operate
161 in a different mode than the PHY in order to function.
164 $ref: /schemas/types.yaml#/definitions/phandle
166 AXI BUS Mode parameters. Phandle to a node that can contain the
168 * snps,lpi_en, enable Low Power Interface
169 * snps,xit_frm, unlock on WoL
170 * snps,wr_osr_lmt, max write outstanding req. limit
171 * snps,rd_osr_lmt, max read outstanding req. limit
172 * snps,kbbe, do not cross 1KiB boundary.
173 * snps,blen, this is a vector of supported burst length.
174 * snps,fb, fixed-burst
175 * snps,mb, mixed-burst
176 * snps,rb, rebuild INCRx Burst
179 $ref: /schemas/types.yaml#/definitions/phandle
181 Multiple RX Queues parameters. Phandle to a node that
182 implements the 'rx-queues-config' object described in
188 snps,rx-queues-to-use:
189 $ref: /schemas/types.yaml#/definitions/uint32
190 description: number of RX queues to be used in the driver
193 description: Strict priority
196 description: Weighted Strict priority
203 snps,rx-sched-wsp: false
209 snps,rx-sched-sp: false
212 description: Each subnode represents a queue.
217 description: Queue to be enabled as DCB
220 description: Queue to be enabled as AVB
221 snps,map-to-dma-channel:
222 $ref: /schemas/types.yaml#/definitions/uint32
223 description: DMA channel id to map
226 description: AV Untagged Control packets
229 description: PTP Packets
232 description: DCB Control Packets
235 description: Untagged Packets
236 snps,route-multi-broad:
238 description: Multicast & Broadcast Packets
240 $ref: /schemas/types.yaml#/definitions/uint32
241 description: Bitmask of the tagged frames priorities assigned to the queue
248 snps,avb-algorithm: false
254 snps,dcb-algorithm: false
260 snps,route-ptp: false
261 snps,route-dcbcp: false
263 snps,route-multi-broad: false
269 snps,route-avcp: false
270 snps,route-dcbcp: false
272 snps,route-multi-broad: false
278 snps,route-avcp: false
279 snps,route-ptp: false
281 snps,route-multi-broad: false
287 snps,route-avcp: false
288 snps,route-ptp: false
289 snps,route-dcbcp: false
290 snps,route-multi-broad: false
293 - snps,route-multi-broad
296 snps,route-avcp: false
297 snps,route-ptp: false
298 snps,route-dcbcp: false
300 additionalProperties: false
301 additionalProperties: false
304 $ref: /schemas/types.yaml#/definitions/phandle
306 Multiple TX Queues parameters. Phandle to a node that
307 implements the 'tx-queues-config' object described in
313 snps,tx-queues-to-use:
314 $ref: /schemas/types.yaml#/definitions/uint32
315 description: number of TX queues to be used in the driver
318 description: Weighted Round Robin
321 description: Weighted Fair Queuing
324 description: Deficit Weighted Round Robin
327 description: Strict priority
334 snps,tx-sched-wfq: false
335 snps,tx-sched-dwrr: false
336 snps,tx-sched-sp: false
342 snps,tx-sched-wrr: false
343 snps,tx-sched-dwrr: false
344 snps,tx-sched-sp: false
350 snps,tx-sched-wrr: false
351 snps,tx-sched-wfq: false
352 snps,tx-sched-sp: false
358 snps,tx-sched-wrr: false
359 snps,tx-sched-wfq: false
360 snps,tx-sched-dwrr: false
363 description: Each subnode represents a queue.
367 $ref: /schemas/types.yaml#/definitions/uint32
368 description: TX queue weight (if using a DCB weight algorithm)
371 description: TX queue will be working in DCB
375 TX queue will be working in AVB.
376 Queue 0 is reserved for legacy traffic and so no AVB is
377 available in this queue.
379 $ref: /schemas/types.yaml#/definitions/uint32
380 description: enable Low Power Interface
382 $ref: /schemas/types.yaml#/definitions/uint32
383 description: unlock on WoL
385 $ref: /schemas/types.yaml#/definitions/uint32
386 description: max write outstanding req. limit
388 $ref: /schemas/types.yaml#/definitions/uint32
389 description: max read outstanding req. limit
391 $ref: /schemas/types.yaml#/definitions/uint32
393 Bitmask of the tagged frames priorities assigned to the queue.
394 When a PFC frame is received with priorities matching the bitmask,
395 the queue is blocked from transmitting for the pause time specified
398 snps,coe-unsupported:
400 description: TX checksum offload is unsupported by the TX queue.
408 snps,avb-algorithm: false
414 snps,dcb-algorithm: false
416 additionalProperties: false
417 additionalProperties: false
425 snps,reset-active-low:
427 $ref: /schemas/types.yaml#/definitions/flag
429 Indicates that the PHY Reset is active low
431 snps,reset-delays-us:
434 Triplet of delays. The 1st cell is reset pre-delay in micro
435 seconds. The 2nd cell is reset pulse in micro seconds. The 3rd
436 cell is reset post-delay in micro seconds.
441 $ref: /schemas/types.yaml#/definitions/flag
443 Use Address-Aligned Beats
446 $ref: /schemas/types.yaml#/definitions/flag
448 Program the DMA to use the fixed burst mode
451 $ref: /schemas/types.yaml#/definitions/flag
453 Program the DMA to use the mixed burst mode
455 snps,force_thresh_dma_mode:
456 $ref: /schemas/types.yaml#/definitions/flag
458 Force DMA to use the threshold mode for both tx and rx
460 snps,force_sf_dma_mode:
461 $ref: /schemas/types.yaml#/definitions/flag
463 Force DMA to use the Store and Forward mode for both tx and
464 rx. This flag is ignored if force_thresh_dma_mode is set.
466 snps,en-tx-lpi-clockgating:
467 $ref: /schemas/types.yaml#/definitions/flag
469 Enable gating of the MAC TX clock during TX low-power mode
471 snps,multicast-filter-bins:
472 $ref: /schemas/types.yaml#/definitions/uint32
474 Number of multicast filter hash bins supported by this device
477 snps,perfect-filter-entries:
478 $ref: /schemas/types.yaml#/definitions/uint32
480 Number of perfect filter entries supported by this device
484 $ref: /schemas/types.yaml#/definitions/uint32
486 Port selection speed that can be passed to the core when PCS
487 is supported. For example, this is used in case of SGMII and
491 $ref: /schemas/types.yaml#/definitions/uint32
493 Frequency division factor for MDC clock.
497 unevaluatedProperties: false
499 Creates and registers an MDIO bus.
503 const: snps,dwmac-mdio
510 unevaluatedProperties: false
512 AXI BUS Mode parameters.
516 $ref: /schemas/types.yaml#/definitions/flag
518 enable Low Power Interface
521 $ref: /schemas/types.yaml#/definitions/flag
526 $ref: /schemas/types.yaml#/definitions/uint32
528 max write outstanding req. limit
531 $ref: /schemas/types.yaml#/definitions/uint32
533 max read outstanding req. limit
536 $ref: /schemas/types.yaml#/definitions/uint32
538 do not cross 1KiB boundary.
541 $ref: /schemas/types.yaml#/definitions/uint32-array
543 this is a vector of supported burst length.
548 $ref: /schemas/types.yaml#/definitions/flag
553 $ref: /schemas/types.yaml#/definitions/flag
558 $ref: /schemas/types.yaml#/definitions/flag
570 snps,reset-active-low: ["snps,reset-gpio"]
571 snps,reset-delays-us: ["snps,reset-gpio"]
574 - $ref: ethernet-controller.yaml#
580 - allwinner,sun7i-a20-gmac
581 - allwinner,sun8i-a83t-emac
582 - allwinner,sun8i-h3-emac
583 - allwinner,sun8i-r40-gmac
584 - allwinner,sun8i-v3s-emac
585 - allwinner,sun50i-a64-emac
591 - qcom,sa8775p-ethqos
592 - qcom,sc8280xp-ethqos
605 Programmable Burst Length (tx and rx)
606 $ref: /schemas/types.yaml#/definitions/uint32
607 enum: [1, 2, 4, 8, 16, 32]
611 Tx Programmable Burst Length. If set, DMA tx will use this
612 value rather than snps,pbl.
613 $ref: /schemas/types.yaml#/definitions/uint32
614 enum: [1, 2, 4, 8, 16, 32]
618 Rx Programmable Burst Length. If set, DMA rx will use this
619 value rather than snps,pbl.
620 $ref: /schemas/types.yaml#/definitions/uint32
621 enum: [1, 2, 4, 8, 16, 32]
624 $ref: /schemas/types.yaml#/definitions/flag
626 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
627 rev < 3.50, don\'t multiply the values by 4.
634 - allwinner,sun7i-a20-gmac
635 - allwinner,sun8i-a83t-emac
636 - allwinner,sun8i-h3-emac
637 - allwinner,sun8i-r40-gmac
638 - allwinner,sun8i-v3s-emac
639 - allwinner,sun50i-a64-emac
640 - loongson,ls2k-dwmac
641 - loongson,ls7a-dwmac
648 - qcom,sa8775p-ethqos
649 - qcom,sc8280xp-ethqos
663 $ref: /schemas/types.yaml#/definitions/flag
665 Enables the TSO feature otherwise it will be managed by
666 MAC HW capability register.
668 additionalProperties: true
672 gmac0: ethernet@e0800000 {
673 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
674 reg = <0xe0800000 0x8000>;
675 interrupt-parent = <&vic1>;
676 interrupts = <24 23 22>;
677 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
678 mac-address = [000000000000]; /* Filled in by U-Boot */
679 max-frame-size = <3800>;
681 snps,multicast-filter-bins = <256>;
682 snps,perfect-filter-entries = <128>;
683 rx-fifo-depth = <16384>;
684 tx-fifo-depth = <16384>;
686 clock-names = "stmmaceth";
687 snps,axi-config = <&stmmac_axi_setup>;
688 snps,mtl-rx-config = <&mtl_rx_setup>;
689 snps,mtl-tx-config = <&mtl_tx_setup>;
691 stmmac_axi_setup: stmmac-axi-config {
692 snps,wr_osr_lmt = <0xf>;
693 snps,rd_osr_lmt = <0xf>;
694 snps,blen = <256 128 64 32 0 0 0>;
697 mtl_rx_setup: rx-queues-config {
698 snps,rx-queues-to-use = <1>;
702 snps,map-to-dma-channel = <0x0>;
703 snps,priority = <0x0>;
707 mtl_tx_setup: tx-queues-config {
708 snps,tx-queues-to-use = <2>;
711 snps,weight = <0x10>;
713 snps,priority = <0x0>;
718 snps,send_slope = <0x1000>;
719 snps,idle_slope = <0x1000>;
720 snps,high_credit = <0x3E800>;
721 snps,low_credit = <0xFFC18000>;
722 snps,priority = <0x1>;
727 #address-cells = <1>;
729 compatible = "snps,dwmac-mdio";
730 phy1: ethernet-phy@0 {
736 # FIXME: We should set it, but it would report all the generic
737 # properties as additional properties.
738 # additionalProperties: false