1 # SPDX-License-Identifier: GPL-2.0
4 $id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Rockchip 10/100/1000 Ethernet driver(GMAC)
10 - David Wu <david.wu@rock-chips.com>
12 # We need a select here so we don't match all nodes with 'snps,dwmac'
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
22 - rockchip,rk3308-gmac
23 - rockchip,rk3328-gmac
24 - rockchip,rk3366-gmac
25 - rockchip,rk3368-gmac
26 - rockchip,rk3399-gmac
27 - rockchip,rk3568-gmac
28 - rockchip,rv1108-gmac
33 - $ref: "snps,dwmac.yaml#"
41 - rockchip,rk3128-gmac
42 - rockchip,rk3228-gmac
43 - rockchip,rk3288-gmac
44 - rockchip,rk3308-gmac
45 - rockchip,rk3328-gmac
46 - rockchip,rk3366-gmac
47 - rockchip,rk3368-gmac
48 - rockchip,rk3399-gmac
49 - rockchip,rv1108-gmac
52 - rockchip,rk3568-gmac
53 - const: snps,dwmac-4.20a
73 For RGMII, it must be "input", means main clock(125MHz)
74 is not sourced from SoC's PLL, but input from PHY.
75 For RMII, "input" means PHY provides the reference clock(50MHz),
76 "output" means GMAC provides the reference clock.
77 $ref: /schemas/types.yaml#/definitions/string
81 description: The phandle of the syscon node for the general register file.
82 $ref: /schemas/types.yaml#/definitions/phandle
85 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
86 $ref: /schemas/types.yaml#/definitions/uint32
89 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
90 $ref: /schemas/types.yaml#/definitions/uint32
93 description: PHY regulator
100 unevaluatedProperties: false
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/clock/rk3288-cru.h>
107 gmac: ethernet@ff290000 {
108 compatible = "rockchip,rk3288-gmac";
109 reg = <0xff290000 0x10000>;
110 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
111 interrupt-names = "macirq";
112 clocks = <&cru SCLK_MAC>,
113 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
114 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
115 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
116 clock-names = "stmmaceth",
117 "mac_clk_rx", "mac_clk_tx",
118 "clk_mac_ref", "clk_mac_refout",
119 "aclk_mac", "pclk_mac";
120 assigned-clocks = <&cru SCLK_MAC>;
121 assigned-clock-parents = <&ext_gmac>;
123 rockchip,grf = <&grf>;
125 clock_in_out = "input";