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[releases.git] / Documentation / devicetree / bindings / net / qcom,ethqos.txt
1 Qualcomm Ethernet ETHQOS device
2
3 This documents dwmmac based ethernet device which supports Gigabit
4 ethernet for version v2.3.0 onwards.
5
6 This device has following properties:
7
8 Required properties:
9
10 - compatible: Should be one of:
11                 "qcom,qcs404-ethqos"
12                 "qcom,sm8150-ethqos"
13
14 - reg: Address and length of the register set for the device
15
16 - reg-names: Should contain register names "stmmaceth", "rgmii"
17
18 - clocks: Should contain phandle to clocks
19
20 - clock-names: Should contain clock names "stmmaceth", "pclk",
21                 "ptp_ref", "rgmii"
22
23 - interrupts: Should contain phandle to interrupts
24
25 - interrupt-names: Should contain interrupt names "macirq", "eth_lpi"
26
27 Rest of the properties are defined in stmmac.txt file in same directory
28
29
30 Example:
31
32 ethernet: ethernet@7a80000 {
33         compatible = "qcom,qcs404-ethqos";
34         reg = <0x07a80000 0x10000>,
35                 <0x07a96000 0x100>;
36         reg-names = "stmmaceth", "rgmii";
37         clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
38         clocks = <&gcc GCC_ETH_AXI_CLK>,
39                 <&gcc GCC_ETH_SLAVE_AHB_CLK>,
40                 <&gcc GCC_ETH_PTP_CLK>,
41                 <&gcc GCC_ETH_RGMII_CLK>;
42         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
43                         <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
44         interrupt-names = "macirq", "eth_lpi";
45         snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
46         snps,reset-active-low;
47
48         snps,txpbl = <8>;
49         snps,rxpbl = <2>;
50         snps,aal;
51         snps,tso;
52
53         phy-handle = <&phy1>;
54         phy-mode = "rgmii";
55
56         mdio {
57                 #address-cells = <0x1>;
58                 #size-cells = <0x0>;
59                 compatible = "snps,dwmac-mdio";
60                 phy1: phy@4 {
61                         device_type = "ethernet-phy";
62                         reg = <0x4>;
63                 };
64         };
65
66 };