Documentation/devicetree/bindings/net/qca,ar803x.yaml

   1 # SPDX-License-Identifier: GPL-2.0+
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/qca,ar803x.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm Atheros AR803x PHY
   8
   9 maintainers:
  10   - Andrew Lunn <andrew@lunn.ch>
  11   - Florian Fainelli <f.fainelli@gmail.com>
  12   - Heiner Kallweit <hkallweit1@gmail.com>
  13
  14 description: |
  15   Bindings for Qualcomm Atheros AR803x PHYs
  16
  17 allOf:
  18   - $ref: ethernet-phy.yaml#
  19
  20 properties:
  21   qca,clk-out-frequency:
  22     description: Clock output frequency in Hertz.
  23     $ref: /schemas/types.yaml#/definitions/uint32
  24     enum: [25000000, 50000000, 62500000, 125000000]
  25
  26   qca,clk-out-strength:
  27     description: Clock output driver strength.
  28     $ref: /schemas/types.yaml#/definitions/uint32
  29     enum: [0, 1, 2]
  30
  31   qca,disable-smarteee:
  32     description: Disable Atheros SmartEEE feature.
  33     type: boolean
  34
  35   qca,keep-pll-enabled:
  36     description: |
  37       If set, keep the PLL enabled even if there is no link. Useful if you
  38       want to use the clock output without an ethernet link.
  39
  40       Only supported on the AR8031.
  41     type: boolean
  42
  43   qca,smarteee-tw-us-100m:
  44     description: EEE Tw parameter for 100M links.
  45     $ref: /schemas/types.yaml#/definitions/uint32
  46     minimum: 1
  47     maximum: 255
  48
  49   qca,smarteee-tw-us-1g:
  50     description: EEE Tw parameter for gigabit links.
  51     $ref: /schemas/types.yaml#/definitions/uint32
  52     minimum: 1
  53     maximum: 255
  54
  55   vddio-supply:
  56     description: |
  57       RGMII I/O voltage regulator (see regulator/regulator.yaml).
  58
  59       The PHY supports RGMII I/O voltages of 1.5V, 1.8V and 2.5V. You can
  60       either connect this to the vddio-regulator (1.5V / 1.8V) or the
  61       vddh-regulator (2.5V).
  62
  63       Only supported on the AR8031.
  64
  65   vddio-regulator:
  66     type: object
  67     description:
  68       Initial data for the VDDIO regulator. Set this to 1.5V or 1.8V.
  69     $ref: /schemas/regulator/regulator.yaml
  70
  71   vddh-regulator:
  72     type: object
  73     description:
  74       Dummy subnode to model the external connection of the PHY VDDH
  75       regulator to VDDIO.
  76     $ref: /schemas/regulator/regulator.yaml
  77
  78 unevaluatedProperties: false
  79
  80 examples:
  81   - |
  82     #include <dt-bindings/net/qca-ar803x.h>
  83
  84     ethernet {
  85         #address-cells = <1>;
  86         #size-cells = <0>;
  87
  88         phy-mode = "rgmii-id";
  89
  90         ethernet-phy@0 {
  91             reg = <0>;
  92
  93             qca,clk-out-frequency = <125000000>;
  94             qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
  95
  96             vddio-supply = <&vddio>;
  97
  98             vddio: vddio-regulator {
  99                 regulator-min-microvolt = <1800000>;
 100                 regulator-max-microvolt = <1800000>;
 101             };
 102         };
 103     };
 104   - |
 105     #include <dt-bindings/net/qca-ar803x.h>
 106
 107     ethernet {
 108         #address-cells = <1>;
 109         #size-cells = <0>;
 110
 111         phy-mode = "rgmii-id";
 112
 113         ethernet-phy@0 {
 114             reg = <0>;
 115
 116             qca,clk-out-frequency = <50000000>;
 117             qca,keep-pll-enabled;
 118
 119             vddio-supply = <&vddh>;
 120
 121             vddh: vddh-regulator {
 122             };
 123         };
 124     };