Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas RZ/N1 MII converter
   8
   9 maintainers:
  10   - Clément Léger <clement.leger@bootlin.com>
  11
  12 description: |
  13   This MII converter is present on the Renesas RZ/N1 SoC family. It is
  14   responsible to do MII passthrough or convert it to RMII/RGMII.
  15
  16 properties:
  17   '#address-cells':
  18     const: 1
  19
  20   '#size-cells':
  21     const: 0
  22
  23   compatible:
  24     items:
  25       - enum:
  26           - renesas,r9a06g032-miic
  27       - const: renesas,rzn1-miic
  28
  29   reg:
  30     maxItems: 1
  31
  32   clocks:
  33     items:
  34       - description: MII reference clock
  35       - description: RGMII reference clock
  36       - description: RMII reference clock
  37       - description: AHB clock used for the MII converter register interface
  38
  39   clock-names:
  40     items:
  41       - const: mii_ref
  42       - const: rgmii_ref
  43       - const: rmii_ref
  44       - const: hclk
  45
  46   renesas,miic-switch-portin:
  47     description: MII Switch PORTIN configuration. This value should use one of
  48       the values defined in dt-bindings/net/pcs-rzn1-miic.h.
  49     $ref: /schemas/types.yaml#/definitions/uint32
  50     enum: [1, 2]
  51
  52   power-domains:
  53     maxItems: 1
  54
  55 patternProperties:
  56   "^mii-conv@[0-5]$":
  57     type: object
  58     description: MII converter port
  59
  60     properties:
  61       reg:
  62         description: MII Converter port number.
  63         enum: [1, 2, 3, 4, 5]
  64
  65       renesas,miic-input:
  66         description: Converter input port configuration. This value should use
  67           one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
  68         $ref: /schemas/types.yaml#/definitions/uint32
  69
  70     required:
  71       - reg
  72       - renesas,miic-input
  73
  74     additionalProperties: false
  75
  76     allOf:
  77       - if:
  78           properties:
  79             reg:
  80               const: 1
  81         then:
  82           properties:
  83             renesas,miic-input:
  84               const: 0
  85       - if:
  86           properties:
  87             reg:
  88               const: 2
  89         then:
  90           properties:
  91             renesas,miic-input:
  92               enum: [1, 11]
  93       - if:
  94           properties:
  95             reg:
  96               const: 3
  97         then:
  98           properties:
  99             renesas,miic-input:
 100               enum: [7, 10]
 101       - if:
 102           properties:
 103             reg:
 104               const: 4
 105         then:
 106           properties:
 107             renesas,miic-input:
 108               enum: [4, 6, 9, 13]
 109       - if:
 110           properties:
 111             reg:
 112               const: 5
 113         then:
 114           properties:
 115             renesas,miic-input:
 116               enum: [3, 5, 8, 12]
 117
 118 required:
 119   - '#address-cells'
 120   - '#size-cells'
 121   - compatible
 122   - reg
 123   - clocks
 124   - clock-names
 125   - power-domains
 126
 127 additionalProperties: false
 128
 129 examples:
 130   - |
 131     #include <dt-bindings/net/pcs-rzn1-miic.h>
 132     #include <dt-bindings/clock/r9a06g032-sysctrl.h>
 133
 134     eth-miic@44030000 {
 135       #address-cells = <1>;
 136       #size-cells = <0>;
 137       compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
 138       reg = <0x44030000 0x10000>;
 139       clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
 140               <&sysctrl R9A06G032_CLK_RGMII_REF>,
 141               <&sysctrl R9A06G032_CLK_RMII_REF>,
 142               <&sysctrl R9A06G032_HCLK_SWITCH_RG>;
 143       clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
 144       renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
 145       power-domains = <&sysctrl>;
 146
 147       mii_conv1: mii-conv@1 {
 148         renesas,miic-input = <MIIC_GMAC1_PORT>;
 149         reg = <1>;
 150       };
 151
 152       mii_conv2: mii-conv@2 {
 153         renesas,miic-input = <MIIC_SWITCH_PORTD>;
 154         reg = <2>;
 155       };
 156
 157       mii_conv3: mii-conv@3 {
 158         renesas,miic-input = <MIIC_SWITCH_PORTC>;
 159         reg = <3>;
 160       };
 161
 162       mii_conv4: mii-conv@4 {
 163         renesas,miic-input = <MIIC_SWITCH_PORTB>;
 164         reg = <4>;
 165       };
 166
 167       mii_conv5: mii-conv@5 {
 168         renesas,miic-input = <MIIC_SWITCH_PORTA>;
 169         reg = <5>;
 170       };
 171     };