1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/fsl,fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Fast Ethernet Controller (FEC)
10 - Joakim Zhang <qiangqing.zhang@nxp.com>
13 - $ref: ethernet-controller.yaml#
29 - const: fsl,imx25-fec
34 - const: fsl,imx27-fec
39 - const: fsl,imx6q-fec
43 - const: fsl,imx6sx-fec
45 - const: fsl,imx8mq-fec
46 - const: fsl,imx6sx-fec
52 - const: fsl,imx8mq-fec
53 - const: fsl,imx6sx-fec
55 - const: fsl,imx8qm-fec
56 - const: fsl,imx6sx-fec
60 - const: fsl,imx8qm-fec
61 - const: fsl,imx6sx-fec
65 - const: fsl,imx6ul-fec
66 - const: fsl,imx6q-fec
96 The "ipg", for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing.
97 The "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
98 The "ptp"(option), for IEEE1588 timer clock that requires the clock.
99 The "enet_clk_ref"(option), for MAC transmit/receiver reference clock like
100 RGMII TXC clock or RMII reference clock. It depends on board design,
101 the clock is required if RGMII TXC and RMII reference clock source from
103 The "enet_out"(option), output clock for external device, like supply clock
104 for PHY. The clock is required if PHY clock source from SOC.
105 The "enet_2x_txclk"(option), for RGMII sampling clock which fixed at 250Mhz.
106 The clock is required if SoC RGMII enable clock delay.
126 local-mac-address: true
132 nvmem-cell-names: true
134 tx-internal-delay-ps:
137 rx-internal-delay-ps:
142 Regulator that powers the Ethernet PHY.
145 $ref: /schemas/types.yaml#/definitions/uint32
147 The property is valid for enet-avb IP, which supports hw multi queues.
148 Should specify the tx queue number, otherwise set tx queue number to 1.
152 $ref: /schemas/types.yaml#/definitions/uint32
154 The property is valid for enet-avb IP, which supports hw multi queues.
155 Should specify the rx queue number, otherwise set rx queue number to 1.
159 $ref: /schemas/types.yaml#/definitions/flag
161 If present, indicates that the hardware supports waking up via magic packet.
163 fsl,err006687-workaround-present:
164 $ref: /schemas/types.yaml#/definitions/flag
166 If present indicates that the system has the hardware workaround for
167 ERR006687 applied and does not need a software workaround.
170 $ref: /schemas/types.yaml#/definitions/phandle-array
173 - description: phandle to general purpose register node
174 - description: the gpr register offset for ENET stop request
175 - description: the gpr bit offset for ENET stop request
177 Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
181 unevaluatedProperties: false
183 Specifies the mdio bus in the FEC, used as a container for phy nodes.
185 # Deprecated optional properties:
186 # To avoid these, create a phy node according to ethernet-phy.yaml in the same
187 # directory, and point the FEC's "phy-handle" property to it. Then use
188 # the phy's reset binding, again described by ethernet-phy.yaml.
193 Should specify the gpio for phy reset.
196 $ref: /schemas/types.yaml#/definitions/uint32
199 Reset duration in milliseconds. Should present only if property
200 "phy-reset-gpios" is available. Missing the property will have the
201 duration be 1 millisecond. Numbers greater than 1000 are invalid
202 and 1 millisecond will be used instead.
204 phy-reset-active-high:
208 If present then the reset sequence using the GPIO specified in the
209 "phy-reset-gpios" property is reversed (H=reset state, L=operation state).
211 phy-reset-post-delay:
212 $ref: /schemas/types.yaml#/definitions/uint32
215 Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay
216 milliseconds will be observed after the phy-reset-gpios has been toggled.
217 Can be omitted thus no delay is observed. Delay is in range of 1ms to 1000ms.
218 Other delays are invalid.
225 # FIXME: We had better set additionalProperties to false to avoid invalid or at
226 # least undocumented properties. However, PHY may have a deprecated option to
227 # place PHY OF properties in the MAC node, such as Micrel PHY, and we can find
228 # these boards which is based on i.MX6QDL.
229 unevaluatedProperties: false
234 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
235 reg = <0x83fec000 0x4000>;
238 phy-reset-gpios = <&gpio2 14 0>;
239 phy-supply = <®_fec_supply>;
243 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
244 reg = <0x83fed000 0x4000>;
247 phy-reset-gpios = <&gpio2 14 0>;
248 phy-supply = <®_fec_supply>;
249 phy-handle = <ðphy0>;
252 #address-cells = <1>;
255 ethphy0: ethernet-phy@0 {
256 compatible = "ethernet-phy-ieee802.3-c22";