Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/dsa/microchip,lan937x.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: LAN937x Ethernet Switch Series Tree Bindings
   8
   9 maintainers:
  10   - UNGLinuxDriver@microchip.com
  11
  12 allOf:
  13   - $ref: dsa.yaml#
  14
  15 properties:
  16   compatible:
  17     enum:
  18       - microchip,lan9370
  19       - microchip,lan9371
  20       - microchip,lan9372
  21       - microchip,lan9373
  22       - microchip,lan9374
  23
  24   reg:
  25     maxItems: 1
  26
  27   spi-max-frequency:
  28     maximum: 50000000
  29
  30   reset-gpios:
  31     description: Optional gpio specifier for a reset line
  32     maxItems: 1
  33
  34   mdio:
  35     $ref: /schemas/net/mdio.yaml#
  36     unevaluatedProperties: false
  37
  38 patternProperties:
  39   "^(ethernet-)?ports$":
  40     patternProperties:
  41       "^(ethernet-)?port@[0-9]+$":
  42         allOf:
  43           - if:
  44               properties:
  45                 phy-mode:
  46                   contains:
  47                     enum:
  48                       - rgmii
  49                       - rgmii-id
  50                       - rgmii-txid
  51                       - rgmii-rxid
  52             then:
  53               properties:
  54                 rx-internal-delay-ps:
  55                   enum: [0, 2000]
  56                   default: 0
  57                 tx-internal-delay-ps:
  58                   enum: [0, 2000]
  59                   default: 0
  60
  61 required:
  62   - compatible
  63   - reg
  64
  65 unevaluatedProperties: false
  66
  67 examples:
  68   - |
  69     #include <dt-bindings/gpio/gpio.h>
  70
  71     macb0 {
  72             #address-cells = <1>;
  73             #size-cells = <0>;
  74
  75             fixed-link {
  76                     speed = <1000>;
  77                     full-duplex;
  78             };
  79     };
  80
  81     spi {
  82             #address-cells = <1>;
  83             #size-cells = <0>;
  84
  85             lan9374: switch@0 {
  86                     compatible = "microchip,lan9374";
  87                     reg = <0>;
  88                     spi-max-frequency = <44000000>;
  89
  90                     ethernet-ports {
  91                             #address-cells = <1>;
  92                             #size-cells = <0>;
  93
  94                             port@0 {
  95                                     reg = <0>;
  96                                     label = "lan1";
  97                                     phy-mode = "internal";
  98                                     phy-handle = <&t1phy0>;
  99                             };
 100
 101                             port@1 {
 102                                     reg = <1>;
 103                                     label = "lan2";
 104                                     phy-mode = "internal";
 105                                     phy-handle = <&t1phy1>;
 106                             };
 107
 108                             port@2 {
 109                                     reg = <2>;
 110                                     label = "lan4";
 111                                     phy-mode = "internal";
 112                                     phy-handle = <&t1phy2>;
 113                             };
 114
 115                             port@3 {
 116                                     reg = <3>;
 117                                     label = "lan6";
 118                                     phy-mode = "internal";
 119                                     phy-handle = <&t1phy3>;
 120                             };
 121
 122                             port@4 {
 123                                     reg = <4>;
 124                                     phy-mode = "rgmii";
 125                                     tx-internal-delay-ps = <2000>;
 126                                     rx-internal-delay-ps = <2000>;
 127                                     ethernet = <&macb0>;
 128
 129                                     fixed-link {
 130                                             speed = <1000>;
 131                                             full-duplex;
 132                                     };
 133                             };
 134
 135                             port@5 {
 136                                     reg = <5>;
 137                                     label = "lan7";
 138                                     phy-mode = "rgmii";
 139                                     tx-internal-delay-ps = <2000>;
 140                                     rx-internal-delay-ps = <2000>;
 141
 142                                     fixed-link {
 143                                             speed = <1000>;
 144                                             full-duplex;
 145                                     };
 146                             };
 147
 148                             port@6 {
 149                                     reg = <6>;
 150                                     label = "lan5";
 151                                     phy-mode = "internal";
 152                                     phy-handle = <&t1phy6>;
 153                             };
 154
 155                             port@7 {
 156                                     reg = <7>;
 157                                     label = "lan3";
 158                                     phy-mode = "internal";
 159                                     phy-handle = <&t1phy7>;
 160                             };
 161                     };
 162
 163                     mdio {
 164                             #address-cells = <1>;
 165                             #size-cells = <0>;
 166
 167                             t1phy0: ethernet-phy@0{
 168                                     reg = <0x0>;
 169                             };
 170
 171                             t1phy1: ethernet-phy@1{
 172                                     reg = <0x1>;
 173                             };
 174
 175                             t1phy2: ethernet-phy@2{
 176                                     reg = <0x2>;
 177                             };
 178
 179                             t1phy3: ethernet-phy@3{
 180                                     reg = <0x3>;
 181                             };
 182
 183                             t1phy6: ethernet-phy@6{
 184                                     reg = <0x6>;
 185                             };
 186
 187                             t1phy7: ethernet-phy@7{
 188                                     reg = <0x7>;
 189                             };
 190                     };
 191             };
 192     };