1 Distributed Switch Architecture Device Tree Bindings
2 ----------------------------------------------------
4 Two bindings exist, one of which has been deprecated due to
10 Switches are true Linux devices and can be probes by any means. Once
11 probed, they register to the DSA framework, passing a node
12 pointer. This node is expected to fulfil the following binding, and
13 may contain additional properties as required by the device it is
18 - ports : A container for child nodes representing switch ports.
22 - dsa,member : A two element list indicates which DSA cluster, and position
23 within the cluster a switch takes. <0 0> is cluster 0,
24 switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
25 switch 0. A switch not part of any cluster (single device
26 hanging off a CPU port) must not specify this property
28 The ports container has the following properties
32 - #address-cells : Must be 1
33 - #size-cells : Must be 0
35 Each port children node must have the following mandatory properties:
36 - reg : Describes the port address in the switch
37 - label : Describes the label associated with this port, which
38 will become the netdev name. Special labels are
39 "cpu" to indicate a CPU port and "dsa" to
40 indicate an uplink/downlink port between switches in
43 A port labelled "dsa" has the following mandatory property:
45 - link : Should be a list of phandles to other switch's DSA
46 port. This port is used as the outgoing port
47 towards the phandle ports. The full routing
48 information must be given, not just the one hop
49 routes to neighbouring switches.
51 A port labelled "cpu" has the following mandatory property:
53 - ethernet : Should be a phandle to a valid Ethernet device node.
54 This host device is what the switch port is
57 Port child nodes may also contain the following optional standardised
58 properties, described in binding documents:
60 - phy-handle : Phandle to a PHY on an MDIO bus. See
61 Documentation/devicetree/bindings/net/ethernet.txt
65 Documentation/devicetree/bindings/net/ethernet.txt
68 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
70 Documentation/devicetree/bindings/net/fixed-link.txt
75 The following example shows three switches on three MDIO busses,
76 linked into one DSA cluster.
83 compatible = "marvell,mv88e6085";
108 switch0port5: port@5 {
111 phy-mode = "rgmii-txid";
112 link = <&switch1port6
134 #address-cells = <1>;
138 compatible = "marvell,mv88e6085";
139 #address-cells = <1>;
146 #address-cells = <1>;
151 phy-handle = <&switch1phy0>;
157 phy-handle = <&switch1phy1>;
163 phy-handle = <&switch1phy2>;
166 switch1port5: port@5 {
169 link = <&switch2port9>;
170 phy-mode = "rgmii-txid";
177 switch1port6: port@6 {
180 phy-mode = "rgmii-txid";
181 link = <&switch0port5>;
189 #address-cells = <1>;
191 switch1phy0: switch1phy0@0 {
194 switch1phy1: switch1phy0@1 {
197 switch1phy2: switch1phy0@2 {
205 #address-cells = <1>;
209 compatible = "marvell,mv88e6085";
210 #address-cells = <1>;
217 #address-cells = <1>;
240 link-gpios = <&gpio6 2
251 link-gpios = <&gpio6 3
256 switch2port9: port@9 {
259 phy-mode = "rgmii-txid";
260 link = <&switch1port5
274 The deprecated binding makes use of a platform device to represent the
275 switches. The switches themselves are not Linux devices, and make use
276 of an MDIO bus for management.
279 - compatible : Should be "marvell,dsa"
280 - #address-cells : Must be 2, first cell is the address on the MDIO bus
281 and second cell is the address in the switch tree.
282 Second cell is used only when cascading/chaining.
283 - #size-cells : Must be 0
284 - dsa,ethernet : Should be a phandle to a valid Ethernet device node
285 - dsa,mii-bus : Should be a phandle to a valid MDIO bus device node
288 - interrupts : property with a value describing the switch
289 interrupt number (not supported by the driver)
291 A DSA node can contain multiple switch chips which are therefore child nodes of
292 the parent DSA node. The maximum number of allowed child nodes is 4
294 Each of these switch child nodes should have the following required properties:
296 - reg : Contains two fields. The first one describes the
297 address on the MII bus. The second is the switch
298 number that must be unique in cascaded configurations
299 - #address-cells : Must be 1
300 - #size-cells : Must be 0
302 A switch child node has the following optional property:
304 - eeprom-length : Set to the length of an EEPROM connected to the
305 switch. Must be set if the switch can not detect
306 the presence and/or size of a connected EEPROM,
309 A switch may have multiple "port" children nodes
311 Each port children node must have the following mandatory properties:
312 - reg : Describes the port address in the switch
313 - label : Describes the label associated with this port, special
314 labels are "cpu" to indicate a CPU port and "dsa" to
315 indicate an uplink/downlink port.
317 Note that a port labelled "dsa" will imply checking for the uplink phandle
321 - link : Should be a list of phandles to another switch's DSA port.
322 This property is only used when switches are being
323 chained/cascaded together. This port is used as outgoing port
324 towards the phandle port, which can be more than one hop away.
326 - phy-handle : Phandle to a PHY on an external MDIO bus, not the
327 switch internal one. See
328 Documentation/devicetree/bindings/net/ethernet.txt
331 - phy-mode : String representing the connection to the designated
332 PHY node specified by the 'phy-handle' property. See
333 Documentation/devicetree/bindings/net/ethernet.txt
336 - mii-bus : Should be a phandle to a valid MDIO bus device node.
337 This mii-bus will be used in preference to the
338 global dsa,mii-bus defined above, for this switch.
341 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
343 Documentation/devicetree/bindings/net/fixed-link.txt
349 compatible = "marvell,dsa";
350 #address-cells = <2>;
354 dsa,ethernet = <ðernet0>;
355 dsa,mii-bus = <&mii_bus0>;
358 #address-cells = <1>;
360 reg = <16 0>; /* MDIO address 16, switch 0 in tree */
365 phy-handle = <&phy0>;
378 switch0port6: port@6 {
381 link = <&switch1port0
387 #address-cells = <1>;
389 reg = <17 1>; /* MDIO address 17, switch 1 in tree */
390 mii-bus = <&mii_bus1>;
391 reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
393 switch1port0: port@0 {
396 link = <&switch0port6>;
398 switch1port1: port@1 {
401 link = <&switch2port1>;
406 #address-cells = <1>;
408 reg = <18 2>; /* MDIO address 18, switch 2 in tree */
409 mii-bus = <&mii_bus1>;
411 switch2port0: port@0 {
414 link = <&switch1port1