Documentation/devicetree/bindings/net/cdns,macb.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/cdns,macb.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Cadence MACB/GEM Ethernet controller
   8
   9 maintainers:
  10   - Nicolas Ferre <nicolas.ferre@microchip.com>
  11   - Claudiu Beznea <claudiu.beznea@microchip.com>
  12
  13 properties:
  14   compatible:
  15     oneOf:
  16       - items:
  17           - enum:
  18               - cdns,at91rm9200-emac  # Atmel at91rm9200 SoC
  19           - const: cdns,emac          # Generic
  20
  21       - items:
  22           - enum:
  23               - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
  24               - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
  25           - const: cdns,gem           # Generic
  26
  27       - items:
  28           - enum:
  29               - cdns,at91sam9260-macb # Atmel at91sam9 SoCs
  30               - cdns,sam9x60-macb     # Microchip sam9x60 SoC
  31           - const: cdns,macb          # Generic
  32
  33       - items:
  34           - enum:
  35               - atmel,sama5d3-macb    # 10/100Mbit IP on Atmel sama5d3 SoCs
  36           - enum:
  37               - cdns,at91sam9260-macb # Atmel at91sam9 SoCs.
  38           - const: cdns,macb          # Generic
  39
  40       - enum:
  41           - atmel,sama5d29-gem        # GEM XL IP (10/100) on Atmel sama5d29 SoCs
  42           - atmel,sama5d2-gem         # GEM IP (10/100) on Atmel sama5d2 SoCs
  43           - atmel,sama5d3-gem         # Gigabit IP on Atmel sama5d3 SoCs
  44           - atmel,sama5d4-gem         # GEM IP (10/100) on Atmel sama5d4 SoCs
  45           - cdns,at32ap7000-macb      # Other 10/100 usage or use the generic form
  46           - cdns,np4-macb             # NP4 SoC devices
  47           - microchip,sama7g5-emac    # Microchip SAMA7G5 ethernet interface
  48           - microchip,sama7g5-gem     # Microchip SAMA7G5 gigabit ethernet interface
  49           - sifive,fu540-c000-gem     # SiFive FU540-C000 SoC
  50           - cdns,emac                 # Generic
  51           - cdns,gem                  # Generic
  52           - cdns,macb                 # Generic
  53
  54   reg:
  55     minItems: 1
  56     items:
  57       - description: Basic register set
  58       - description: GEMGXL Management block registers on SiFive FU540-C000 SoC
  59
  60   interrupts:
  61     minItems: 1
  62     maxItems: 8
  63     description: One interrupt per available hardware queue
  64
  65   clocks:
  66     minItems: 1
  67     maxItems: 5
  68
  69   clock-names:
  70     minItems: 1
  71     items:
  72       - enum: [ ether_clk, hclk, pclk ]
  73       - enum: [ hclk, pclk ]
  74       - const: tx_clk
  75       - enum: [ rx_clk, tsu_clk ]
  76       - const: tsu_clk
  77
  78   local-mac-address: true
  79
  80   phy-mode: true
  81
  82   phy-handle: true
  83
  84   phys:
  85     maxItems: 1
  86
  87   resets:
  88     maxItems: 1
  89     description:
  90       Recommended with ZynqMP, specify reset control for this
  91       controller instance with zynqmp-reset driver.
  92
  93   reset-names:
  94     maxItems: 1
  95
  96   fixed-link: true
  97
  98   iommus:
  99     maxItems: 1
 100
 101   power-domains:
 102     maxItems: 1
 103
 104   '#address-cells':
 105     const: 1
 106
 107   '#size-cells':
 108     const: 0
 109
 110   mdio:
 111     type: object
 112     description:
 113       Node containing PHY children. If this node is not present, then PHYs will
 114       be direct children.
 115
 116 patternProperties:
 117   "^ethernet-phy@[0-9a-f]$":
 118     type: object
 119     $ref: ethernet-phy.yaml#
 120
 121     properties:
 122       reset-gpios: true
 123
 124       magic-packet:
 125         type: boolean
 126         description:
 127           Indicates that the hardware supports waking up via magic packet.
 128
 129     unevaluatedProperties: false
 130
 131 required:
 132   - compatible
 133   - reg
 134   - interrupts
 135   - clocks
 136   - clock-names
 137   - phy-mode
 138
 139 allOf:
 140   - $ref: ethernet-controller.yaml#
 141
 142   - if:
 143       not:
 144         properties:
 145           compatible:
 146             contains:
 147               const: sifive,fu540-c000-gem
 148     then:
 149       properties:
 150         reg:
 151           maxItems: 1
 152
 153 unevaluatedProperties: false
 154
 155 examples:
 156   - |
 157     macb0: ethernet@fffc4000 {
 158             compatible = "cdns,at32ap7000-macb";
 159             reg = <0xfffc4000 0x4000>;
 160             interrupts = <21>;
 161             phy-mode = "rmii";
 162             local-mac-address = [3a 0e 03 04 05 06];
 163             clock-names = "pclk", "hclk", "tx_clk";
 164             clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
 165             #address-cells = <1>;
 166             #size-cells = <0>;
 167
 168             ethernet-phy@1 {
 169                     reg = <0x1>;
 170                     reset-gpios = <&pioE 6 1>;
 171             };
 172     };
 173
 174   - |
 175     #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
 176     #include <dt-bindings/power/xlnx-zynqmp-power.h>
 177     #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
 178     #include <dt-bindings/phy/phy.h>
 179
 180     bus {
 181             #address-cells = <2>;
 182             #size-cells = <2>;
 183             gem1: ethernet@ff0c0000 {
 184                     compatible = "cdns,zynqmp-gem", "cdns,gem";
 185                     interrupt-parent = <&gic>;
 186                     interrupts = <0 59 4>, <0 59 4>;
 187                     reg = <0x0 0xff0c0000 0x0 0x1000>;
 188                     clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
 189                              <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
 190                              <&zynqmp_clk GEM_TSU>;
 191                     clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 192                     #address-cells = <1>;
 193                     #size-cells = <0>;
 194                     iommus = <&smmu 0x875>;
 195                     power-domains = <&zynqmp_firmware PD_ETH_1>;
 196                     resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
 197                     reset-names = "gem1_rst";
 198                     status = "okay";
 199                     phy-mode = "sgmii";
 200                     phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
 201                     fixed-link {
 202                             speed = <1000>;
 203                             full-duplex;
 204                             pause;
 205                     };
 206             };
 207     };