Linux 6.7-rc7
[linux-modified.git] / Documentation / devicetree / bindings / net / can / xilinx,can.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/net/can/xilinx,can.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title:
8   Xilinx Axi CAN/Zynq CANPS controller
9
10 maintainers:
11   - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
12
13 properties:
14   compatible:
15     enum:
16       - xlnx,zynq-can-1.0
17       - xlnx,axi-can-1.00.a
18       - xlnx,canfd-1.0
19       - xlnx,canfd-2.0
20
21   reg:
22     maxItems: 1
23
24   interrupts:
25     maxItems: 1
26
27   clocks:
28     minItems: 1
29     maxItems: 2
30
31   clock-names:
32     maxItems: 2
33
34   power-domains:
35     maxItems: 1
36
37   tx-fifo-depth:
38     $ref: /schemas/types.yaml#/definitions/uint32
39     description: CAN Tx fifo depth (Zynq, Axi CAN).
40
41   rx-fifo-depth:
42     $ref: /schemas/types.yaml#/definitions/uint32
43     description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode)
44
45   tx-mailbox-count:
46     $ref: /schemas/types.yaml#/definitions/uint32
47     description: CAN Tx mailbox buffer count (CAN FD)
48
49   resets:
50     maxItems: 1
51
52 required:
53   - compatible
54   - reg
55   - interrupts
56   - clocks
57   - clock-names
58
59 unevaluatedProperties: false
60
61 allOf:
62   - $ref: can-controller.yaml#
63   - if:
64       properties:
65         compatible:
66           contains:
67             enum:
68               - xlnx,zynq-can-1.0
69
70     then:
71       properties:
72         clock-names:
73           items:
74             - const: can_clk
75             - const: pclk
76       required:
77         - tx-fifo-depth
78         - rx-fifo-depth
79
80   - if:
81       properties:
82         compatible:
83           contains:
84             enum:
85               - xlnx,axi-can-1.00.a
86
87     then:
88       properties:
89         clock-names:
90           items:
91             - const: can_clk
92             - const: s_axi_aclk
93       required:
94         - tx-fifo-depth
95         - rx-fifo-depth
96
97   - if:
98       properties:
99         compatible:
100           contains:
101             enum:
102               - xlnx,canfd-1.0
103               - xlnx,canfd-2.0
104
105     then:
106       properties:
107         clock-names:
108           items:
109             - const: can_clk
110             - const: s_axi_aclk
111       required:
112         - tx-mailbox-count
113         - rx-fifo-depth
114
115 examples:
116   - |
117     #include <dt-bindings/interrupt-controller/arm-gic.h>
118
119     can@e0008000 {
120         compatible = "xlnx,zynq-can-1.0";
121         reg = <0xe0008000 0x1000>;
122         clocks = <&clkc 19>, <&clkc 36>;
123         clock-names = "can_clk", "pclk";
124         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
125         interrupt-parent = <&intc>;
126         tx-fifo-depth = <0x40>;
127         rx-fifo-depth = <0x40>;
128     };
129
130   - |
131     can@40000000 {
132         compatible = "xlnx,axi-can-1.00.a";
133         reg = <0x40000000 0x10000>;
134         clocks = <&clkc 0>, <&clkc 1>;
135         clock-names = "can_clk", "s_axi_aclk";
136         interrupt-parent = <&intc>;
137         interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
138         tx-fifo-depth = <0x40>;
139         rx-fifo-depth = <0x40>;
140     };
141
142   - |
143     can@40000000 {
144         compatible = "xlnx,canfd-1.0";
145         reg = <0x40000000 0x2000>;
146         clocks = <&clkc 0>, <&clkc 1>;
147         clock-names = "can_clk", "s_axi_aclk";
148         interrupt-parent = <&intc>;
149         interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
150         tx-mailbox-count = <0x20>;
151         rx-fifo-depth = <0x20>;
152     };
153
154   - |
155     can@ff060000 {
156         compatible = "xlnx,canfd-2.0";
157         reg = <0xff060000 0x6000>;
158         clocks = <&clkc 0>, <&clkc 1>;
159         clock-names = "can_clk", "s_axi_aclk";
160         interrupt-parent = <&intc>;
161         interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
162         tx-mailbox-count = <0x20>;
163         rx-fifo-depth = <0x40>;
164     };