1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car CAN FD Controller
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
13 - $ref: can-controller.yaml#
20 - renesas,r8a774a1-canfd # RZ/G2M
21 - renesas,r8a774b1-canfd # RZ/G2N
22 - renesas,r8a774c0-canfd # RZ/G2E
23 - renesas,r8a774e1-canfd # RZ/G2H
24 - renesas,r8a7795-canfd # R-Car H3
25 - renesas,r8a7796-canfd # R-Car M3-W
26 - renesas,r8a77961-canfd # R-Car M3-W+
27 - renesas,r8a77965-canfd # R-Car M3-N
28 - renesas,r8a77970-canfd # R-Car V3M
29 - renesas,r8a77980-canfd # R-Car V3H
30 - renesas,r8a77990-canfd # R-Car E3
31 - renesas,r8a77995-canfd # R-Car D3
32 - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
36 - renesas,r9a07g043-canfd # RZ/G2UL
37 - renesas,r9a07g044-canfd # RZ/G2{L,LC}
38 - renesas,r9a07g054-canfd # RZ/V2L
39 - const: renesas,rzg2l-canfd # RZ/G2L family
41 - const: renesas,r8a779a0-canfd # R-Car V3U
63 $ref: /schemas/types.yaml#/definitions/flag
65 The controller can operate in either CAN FD only mode (default) or
66 Classical CAN only mode. The mode is global to both the channels.
67 Specify this property to put the controller in Classical CAN only mode.
71 Reference to the CANFD clock. The CANFD clock is a div6 clock and can be
72 used by both CAN (if present) and CAN FD controllers at the same time.
73 It needs to be scaled to maximum frequency if any of these controllers
77 description: Maximum frequency of the CANFD clock.
83 The controller supports two channels and each is represented as a child
84 node. Each child node supports the "status" property only, which
85 is used to enable/disable the respective channel.
97 - assigned-clock-rates
106 - renesas,rzg2l-canfd
111 - description: CAN global error interrupt
112 - description: CAN receive FIFO interrupt
113 - description: CAN0 error interrupt
114 - description: CAN0 transmit interrupt
115 - description: CAN0 transmit/receive FIFO receive completion interrupt
116 - description: CAN1 error interrupt
117 - description: CAN1 transmit interrupt
118 - description: CAN1 transmit/receive FIFO receive completion interrupt
145 - description: Channel interrupt
146 - description: Global interrupt
156 unevaluatedProperties: false
160 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
161 #include <dt-bindings/interrupt-controller/arm-gic.h>
162 #include <dt-bindings/power/r8a7795-sysc.h>
164 canfd: can@e66c0000 {
165 compatible = "renesas,r8a7795-canfd",
166 "renesas,rcar-gen3-canfd";
167 reg = <0xe66c0000 0x8000>;
168 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
169 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
170 interrupt-names = "ch_int", "g_int";
171 clocks = <&cpg CPG_MOD 914>,
172 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
174 clock-names = "fck", "canfd", "can_clk";
175 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
176 assigned-clock-rates = <40000000>;
177 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;