1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t EMAC Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-emac
19 - const: allwinner,sun8i-v3s-emac
20 - const: allwinner,sun50i-a64-emac
23 - allwinner,sun20i-d1-emac
24 - allwinner,sun50i-h6-emac
25 - const: allwinner,sun50i-a64-emac
43 $ref: /schemas/types.yaml#/definitions/phandle
45 Phandle to the device containing the EMAC or GMAC clock
62 - $ref: "snps,dwmac.yaml#"
68 - allwinner,sun8i-a83t-emac
69 - allwinner,sun8i-h3-emac
70 - allwinner,sun8i-v3s-emac
71 - allwinner,sun50i-a64-emac
75 allwinner,tx-delay-ps:
81 External RGMII PHY TX clock delay chain value in ps.
83 allwinner,rx-delay-ps:
89 External RGMII PHY TX clock delay chain value in ps.
96 - allwinner,sun8i-r40-emac
100 allwinner,rx-delay-ps:
106 External RGMII PHY TX clock delay chain value in ps.
113 - allwinner,sun8i-h3-emac
114 - allwinner,sun8i-v3s-emac
118 allwinner,leds-active-low:
119 $ref: /schemas/types.yaml#/definitions/flag
121 EPHY LEDs are active low.
128 const: allwinner,sun8i-h3-mdio-mux
131 $ref: /schemas/types.yaml#/definitions/phandle
133 Phandle to EMAC MDIO.
137 description: Internal MDIO Bus
147 const: allwinner,sun8i-h3-mdio-internal
153 "^ethernet-phy@[0-9a-f]$":
172 description: External MDIO Bus (H3 only)
189 unevaluatedProperties: false
194 compatible = "allwinner,sun8i-h3-emac";
196 reg = <0x01c0b000 0x104>;
197 interrupts = <0 82 1>;
198 interrupt-names = "macirq";
200 reset-names = "stmmaceth";
202 clock-names = "stmmaceth";
204 phy-handle = <&int_mii_phy>;
206 allwinner,leds-active-low;
209 #address-cells = <1>;
211 compatible = "snps,dwmac-mdio";
215 compatible = "allwinner,sun8i-h3-mdio-mux";
216 #address-cells = <1>;
219 mdio-parent-bus = <&mdio1>;
221 int_mii_phy: mdio@1 {
222 compatible = "allwinner,sun8i-h3-mdio-internal";
224 #address-cells = <1>;
237 #address-cells = <1>;
245 compatible = "allwinner,sun8i-h3-emac";
247 reg = <0x01c0b000 0x104>;
248 interrupts = <0 82 1>;
249 interrupt-names = "macirq";
251 reset-names = "stmmaceth";
253 clock-names = "stmmaceth";
255 phy-handle = <&ext_rgmii_phy>;
257 allwinner,leds-active-low;
260 #address-cells = <1>;
262 compatible = "snps,dwmac-mdio";
266 compatible = "allwinner,sun8i-h3-mdio-mux";
267 #address-cells = <1>;
269 mdio-parent-bus = <&mdio2>;
272 compatible = "allwinner,sun8i-h3-mdio-internal";
274 #address-cells = <1>;
286 #address-cells = <1>;
289 ext_rgmii_phy: ethernet-phy@1 {
298 compatible = "allwinner,sun8i-a83t-emac";
300 reg = <0x01c0b000 0x104>;
301 interrupts = <0 82 1>;
302 interrupt-names = "macirq";
304 reset-names = "stmmaceth";
306 clock-names = "stmmaceth";
307 phy-handle = <&ext_rgmii_phy1>;
311 compatible = "snps,dwmac-mdio";
312 #address-cells = <1>;
315 ext_rgmii_phy1: ethernet-phy@1 {