Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A83t EMAC
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 properties:
  14   compatible:
  15     oneOf:
  16       - const: allwinner,sun8i-a83t-emac
  17       - const: allwinner,sun8i-h3-emac
  18       - const: allwinner,sun8i-r40-gmac
  19       - const: allwinner,sun8i-v3s-emac
  20       - const: allwinner,sun50i-a64-emac
  21       - items:
  22           - enum:
  23               - allwinner,sun20i-d1-emac
  24               - allwinner,sun50i-h6-emac
  25               - allwinner,sun50i-h616-emac0
  26           - const: allwinner,sun50i-a64-emac
  27
  28   reg:
  29     maxItems: 1
  30
  31   interrupts:
  32     maxItems: 1
  33
  34   interrupt-names:
  35     const: macirq
  36
  37   clocks:
  38     maxItems: 1
  39
  40   clock-names:
  41     const: stmmaceth
  42
  43   phy-supply:
  44     description: PHY regulator
  45
  46   syscon:
  47     $ref: /schemas/types.yaml#/definitions/phandle
  48     description:
  49       Phandle to the device containing the EMAC or GMAC clock
  50       register
  51
  52 required:
  53   - compatible
  54   - reg
  55   - interrupts
  56   - interrupt-names
  57   - clocks
  58   - clock-names
  59   - resets
  60   - reset-names
  61   - phy-handle
  62   - phy-mode
  63   - syscon
  64
  65 allOf:
  66   - $ref: snps,dwmac.yaml#
  67   - if:
  68       properties:
  69         compatible:
  70           contains:
  71             enum:
  72               - allwinner,sun8i-a83t-emac
  73               - allwinner,sun8i-h3-emac
  74               - allwinner,sun8i-v3s-emac
  75               - allwinner,sun50i-a64-emac
  76
  77     then:
  78       properties:
  79         allwinner,tx-delay-ps:
  80           default: 0
  81           minimum: 0
  82           maximum: 700
  83           multipleOf: 100
  84           description:
  85             External RGMII PHY TX clock delay chain value in ps.
  86
  87         allwinner,rx-delay-ps:
  88           default: 0
  89           minimum: 0
  90           maximum: 3100
  91           multipleOf: 100
  92           description:
  93             External RGMII PHY TX clock delay chain value in ps.
  94
  95   - if:
  96       properties:
  97         compatible:
  98           contains:
  99             enum:
 100               - allwinner,sun8i-r40-gmac
 101
 102     then:
 103       properties:
 104         allwinner,rx-delay-ps:
 105           default: 0
 106           minimum: 0
 107           maximum: 700
 108           multipleOf: 100
 109           description:
 110             External RGMII PHY TX clock delay chain value in ps.
 111
 112   - if:
 113       properties:
 114         compatible:
 115           contains:
 116             enum:
 117               - allwinner,sun8i-h3-emac
 118               - allwinner,sun8i-v3s-emac
 119
 120     then:
 121       properties:
 122         allwinner,leds-active-low:
 123           $ref: /schemas/types.yaml#/definitions/flag
 124           description:
 125             EPHY LEDs are active low.
 126
 127         mdio-mux:
 128           type: object
 129           unevaluatedProperties: false
 130
 131           properties:
 132             compatible:
 133               const: allwinner,sun8i-h3-mdio-mux
 134
 135             mdio-parent-bus:
 136               $ref: /schemas/types.yaml#/definitions/phandle
 137               description:
 138                 Phandle to EMAC MDIO.
 139
 140             "#address-cells":
 141               const: 1
 142
 143             "#size-cells":
 144               const: 0
 145
 146             mdio@1:
 147               $ref: mdio.yaml#
 148               unevaluatedProperties: false
 149               description: Internal MDIO Bus
 150
 151               properties:
 152                 compatible:
 153                   const: allwinner,sun8i-h3-mdio-internal
 154
 155                 reg:
 156                   const: 1
 157
 158               patternProperties:
 159                 "^ethernet-phy@[0-9a-f]$":
 160                   type: object
 161                   $ref: ethernet-phy.yaml#
 162                   unevaluatedProperties: false
 163                   description:
 164                     Integrated PHY node
 165
 166                   properties:
 167                     clocks:
 168                       maxItems: 1
 169
 170                     resets:
 171                       maxItems: 1
 172
 173                   required:
 174                     - clocks
 175                     - resets
 176
 177
 178             mdio@2:
 179               $ref: mdio.yaml#
 180               unevaluatedProperties: false
 181               description: External MDIO Bus (H3 only)
 182
 183               properties:
 184                 reg:
 185                   const: 2
 186
 187           required:
 188             - compatible
 189             - mdio-parent-bus
 190             - mdio@1
 191
 192 unevaluatedProperties: false
 193
 194 examples:
 195   - |
 196     ethernet@1c0b000 {
 197         compatible = "allwinner,sun8i-h3-emac";
 198         syscon = <&syscon>;
 199         reg = <0x01c0b000 0x104>;
 200         interrupts = <0 82 1>;
 201         interrupt-names = "macirq";
 202         resets = <&ccu 12>;
 203         reset-names = "stmmaceth";
 204         clocks = <&ccu 27>;
 205         clock-names = "stmmaceth";
 206
 207         phy-handle = <&int_mii_phy>;
 208         phy-mode = "mii";
 209         allwinner,leds-active-low;
 210
 211         mdio1: mdio {
 212             #address-cells = <1>;
 213             #size-cells = <0>;
 214             compatible = "snps,dwmac-mdio";
 215         };
 216
 217         mdio-mux {
 218             compatible = "allwinner,sun8i-h3-mdio-mux";
 219             #address-cells = <1>;
 220             #size-cells = <0>;
 221
 222             mdio-parent-bus = <&mdio1>;
 223
 224             int_mii_phy: mdio@1 {
 225                 compatible = "allwinner,sun8i-h3-mdio-internal";
 226                 reg = <1>;
 227                 #address-cells = <1>;
 228                 #size-cells = <0>;
 229
 230                 ethernet-phy@1 {
 231                     reg = <1>;
 232                     clocks = <&ccu 67>;
 233                     resets = <&ccu 39>;
 234                     phy-is-integrated;
 235                 };
 236             };
 237
 238             mdio@2 {
 239                 reg = <2>;
 240                 #address-cells = <1>;
 241                 #size-cells = <0>;
 242             };
 243         };
 244     };
 245
 246   - |
 247     ethernet@1c0b000 {
 248         compatible = "allwinner,sun8i-h3-emac";
 249         syscon = <&syscon>;
 250         reg = <0x01c0b000 0x104>;
 251         interrupts = <0 82 1>;
 252         interrupt-names = "macirq";
 253         resets = <&ccu 12>;
 254         reset-names = "stmmaceth";
 255         clocks = <&ccu 27>;
 256         clock-names = "stmmaceth";
 257
 258         phy-handle = <&ext_rgmii_phy>;
 259         phy-mode = "rgmii";
 260         allwinner,leds-active-low;
 261
 262         mdio2: mdio {
 263             #address-cells = <1>;
 264             #size-cells = <0>;
 265             compatible = "snps,dwmac-mdio";
 266         };
 267
 268         mdio-mux {
 269             compatible = "allwinner,sun8i-h3-mdio-mux";
 270             #address-cells = <1>;
 271             #size-cells = <0>;
 272             mdio-parent-bus = <&mdio2>;
 273
 274             mdio@1 {
 275                 compatible = "allwinner,sun8i-h3-mdio-internal";
 276                 reg = <1>;
 277                 #address-cells = <1>;
 278                 #size-cells = <0>;
 279
 280                 ethernet-phy@1 {
 281                     reg = <1>;
 282                     clocks = <&ccu 67>;
 283                     resets = <&ccu 39>;
 284                 };
 285             };
 286
 287             mdio@2 {
 288                 reg = <2>;
 289                 #address-cells = <1>;
 290                 #size-cells = <0>;
 291
 292                 ext_rgmii_phy: ethernet-phy@1 {
 293                     reg = <1>;
 294                 };
 295             };
 296         };
 297     };
 298
 299   - |
 300     ethernet@1c0b000 {
 301         compatible = "allwinner,sun8i-a83t-emac";
 302         syscon = <&syscon>;
 303         reg = <0x01c0b000 0x104>;
 304         interrupts = <0 82 1>;
 305         interrupt-names = "macirq";
 306         resets = <&ccu 13>;
 307         reset-names = "stmmaceth";
 308         clocks = <&ccu 27>;
 309         clock-names = "stmmaceth";
 310         phy-handle = <&ext_rgmii_phy1>;
 311         phy-mode = "rgmii";
 312
 313         mdio {
 314             compatible = "snps,dwmac-mdio";
 315             #address-cells = <1>;
 316             #size-cells = <0>;
 317
 318             ext_rgmii_phy1: ethernet-phy@1 {
 319                 reg = <1>;
 320             };
 321         };
 322     };
 323
 324 ...