1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t EMAC
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
20 - const: allwinner,sun50i-a64-emac
23 - allwinner,sun20i-d1-emac
24 - allwinner,sun50i-h6-emac
25 - allwinner,sun50i-h616-emac0
26 - const: allwinner,sun50i-a64-emac
44 $ref: /schemas/types.yaml#/definitions/phandle
46 Phandle to the device containing the EMAC or GMAC clock
63 - $ref: "snps,dwmac.yaml#"
69 - allwinner,sun8i-a83t-emac
70 - allwinner,sun8i-h3-emac
71 - allwinner,sun8i-v3s-emac
72 - allwinner,sun50i-a64-emac
76 allwinner,tx-delay-ps:
82 External RGMII PHY TX clock delay chain value in ps.
84 allwinner,rx-delay-ps:
90 External RGMII PHY TX clock delay chain value in ps.
97 - allwinner,sun8i-r40-gmac
101 allwinner,rx-delay-ps:
107 External RGMII PHY TX clock delay chain value in ps.
114 - allwinner,sun8i-h3-emac
115 - allwinner,sun8i-v3s-emac
119 allwinner,leds-active-low:
120 $ref: /schemas/types.yaml#/definitions/flag
122 EPHY LEDs are active low.
126 unevaluatedProperties: false
130 const: allwinner,sun8i-h3-mdio-mux
133 $ref: /schemas/types.yaml#/definitions/phandle
135 Phandle to EMAC MDIO.
145 unevaluatedProperties: false
146 description: Internal MDIO Bus
150 const: allwinner,sun8i-h3-mdio-internal
156 "^ethernet-phy@[0-9a-f]$":
175 unevaluatedProperties: false
176 description: External MDIO Bus (H3 only)
187 unevaluatedProperties: false
192 compatible = "allwinner,sun8i-h3-emac";
194 reg = <0x01c0b000 0x104>;
195 interrupts = <0 82 1>;
196 interrupt-names = "macirq";
198 reset-names = "stmmaceth";
200 clock-names = "stmmaceth";
202 phy-handle = <&int_mii_phy>;
204 allwinner,leds-active-low;
207 #address-cells = <1>;
209 compatible = "snps,dwmac-mdio";
213 compatible = "allwinner,sun8i-h3-mdio-mux";
214 #address-cells = <1>;
217 mdio-parent-bus = <&mdio1>;
219 int_mii_phy: mdio@1 {
220 compatible = "allwinner,sun8i-h3-mdio-internal";
222 #address-cells = <1>;
235 #address-cells = <1>;
243 compatible = "allwinner,sun8i-h3-emac";
245 reg = <0x01c0b000 0x104>;
246 interrupts = <0 82 1>;
247 interrupt-names = "macirq";
249 reset-names = "stmmaceth";
251 clock-names = "stmmaceth";
253 phy-handle = <&ext_rgmii_phy>;
255 allwinner,leds-active-low;
258 #address-cells = <1>;
260 compatible = "snps,dwmac-mdio";
264 compatible = "allwinner,sun8i-h3-mdio-mux";
265 #address-cells = <1>;
267 mdio-parent-bus = <&mdio2>;
270 compatible = "allwinner,sun8i-h3-mdio-internal";
272 #address-cells = <1>;
284 #address-cells = <1>;
287 ext_rgmii_phy: ethernet-phy@1 {
296 compatible = "allwinner,sun8i-a83t-emac";
298 reg = <0x01c0b000 0x104>;
299 interrupts = <0 82 1>;
300 interrupt-names = "macirq";
302 reset-names = "stmmaceth";
304 clock-names = "stmmaceth";
305 phy-handle = <&ext_rgmii_phy1>;
309 compatible = "snps,dwmac-mdio";
310 #address-cells = <1>;
313 ext_rgmii_phy1: ethernet-phy@1 {